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Method for reducing surface leakage current on semiconductor intergrated circuits during polyimide passivation

  • US 5,807,787 A
  • Filed: 12/02/1996
  • Issued: 09/15/1998
  • Est. Priority Date: 12/02/1996
  • Status: Expired due to Term
First Claim
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1. A method of forming a polyimide passivation layer on semiconductor integrated circuits with reduced surface leakage currents between bonding pads, comprising the steps of;

  • providing a semiconducting substrate having semiconductor devices formed in and on said substrate, said semiconductor devices electrically connected by a multilayer of patterned electrical conducting layers and alternate insulating layers having interconnecting contact openings between said patterned conducting layers, and thereby providing said semiconductor integrated circuits;

    depositing a top insulating layer;

    etching contact openings in said top insulating layer to portions of said semiconductor integrated circuits;

    forming an array of electrically conductive bonding pads on said top insulating layer and over said contact openings;

    depositing a first passivation layer on said bonding pads and elsewhere on said substrate;

    etching openings in said first passivation layer over and to the surface of said bonding pads;

    depositing by spin coating a second passivation layer, composed of polyimide, on said first passivation layer and in said etched openings over said bonding pads;

    patterning said polyimide second passivation layer removing portions over said array of bonding pads and over said first passivation layer between said bonding pads;

    plasma ashing in oxygen said substrate surface, and thereby removing polyimide residue on said bonding pads, said plasma ashing also causing an increase in the surface leakage current on said first passivation layer between said bonding pads;

    thermally treating said substrate, and thereby eliminating said increase in surface leakage current, and provide a polyimide passivation layer on said semiconductor integrated circuits having reduced surface leakage currents between said bonding pads.

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