Monolithic semiconductor device having a microstructure and a transistor

• US 5,808,331 A
• Filed: 07/16/1997
• Issued: 09/15/1998
• Est. Priority Date: 09/05/1995
• Status: Expired due to Fees

• Current Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Gutteridge, Ronald J., Zhang, Zuoying L., Li, Guang X., Kar, Barun K., Joseph, Eric D.
• Primary Examiner(s): MINTEL, WILLIAM A
• Application Number:
  US08/895,171
• Time in Patent Office: 426 Days
• Field of Search: 257/254, 257/417, 257/418, 257/419, 257/420, 257/415, 73/514.21, 73/514.22, 73/514.36, 73/514.37, 73/514.24, 73/514.38, 73/DIG. 1
• US Class Current: 257/254
• CPC Class Codes: B81C 1/00246 Monolithic integration, i.e. micromechanical structure and electronic processing unit are integrated on the same substrate
• CPC Class Codes: B81C 2203/0742 Interleave, i.e. simultaneously forming the micromechanical structure and the CMOS circuit

Abstract

A semiconductor device (15) having a sensor (11) and a transistor (10) formed on a monolithic semiconductor substrate (16). The sensor (11) has a source region (41), a drain region (42), and a microstructure (12) which is formed from a conductive layer (28). The microstructure (12) modulates a channel region between the source and drain regions (41,42). The transistor has a gate structure, a portion of which is formed from the same conductive layer (28) used to form the microstructure (12). Anneal steps are performed on the conductive layer (28) to remove stress prior to the formation of source and drain regions (34,36) of the transistor (10). A self-test structure (14) is formed adjacent to the microstructure (12) which is used to calibrate and verify the operation of the sensor (11).

Claims

1. A monolithic semiconductor device having a sensor and a transistor comprising:

a semiconductor substrate;

the sensor having a source region, a drain region and a channel region in the semiconductor substrate, and a microstructure, wherein the microstructure comprises a conductive layer overlying the semiconductor substrate, and the microstructure is electrically coupled solely to regions in the semiconductor substrate underlying the microstructure as the microstructure moves in response to acceleration; and

the transistor having a gate structure, wherein the conductive layer used to form the microstructure is also used to form at least a portion of the gate structure, and the conductive layer used to form the microstructure comprises a same material used to form at least a portion of the gate structure.

2. The monolithic semiconductor device having a sensor and a transistor of claim 1, wherein the transistor formed is selected from the group consisting of field effect transistor, and insulated gate bi-polar transistor.

3. The monolithic semiconductor device having a sensor and a transistor of claim 1, wherein the conductive layer is formed from a layer of polysilicon.

4. The monolithic semiconductor device having a sensor and a transistor of claim 3, wherein the layer of polysilicon is doped to a resistivity of 5 ohms/sq to 10,000 ohms/sq.

5. The monolithic semiconductor device having a sensor and a transistor of claim 1, further comprising a self-test structure underlying the microstructure.

6. The monolithic semiconductor device having a sensor and a transistor of claim 5, wherein the self-test structure comprises a conductive layer.

7. The monolithic semiconductor device having a sensor and a transistor of claim 5, wherein the self-test structure comprises a doped region in the semiconductor substrate.

8. A semiconductor device comprising:

a substrate;

a source region, a channel region, and a drain region in the substrate, wherein the source region, the channel region, and the drain region are provided by dopant of the same conductivity type;

a sensor formed in a first region of the semiconductor device, wherein the sensor has a moveable microstructure comprising a conductive layer that has a first portion higher than a second portion, the moveable microstructure modulates the channel region; and

a field effect transistor formed in a second region, wherein the field effect transistor has a gate structure.

9. The semiconductor device of claim 8, wherein the gate structure comprises the conductive layer used to form the moveable microstructure.

10. The semiconductor device of claim 8, wherein the conductive layer is formed from a layer of polysilicon.

11. The semiconductor device of claim 10, wherein the layer of polysilicon is doped to a resistivity of 5 ohms/sq to 10,000 ohms/sq.

12. The semiconductor device of claim 8, wherein the sensor is an accelerometer.

13. The semiconductor device of claim 8, further comprising a self-test structure adjacent to the moveable microstructure.

27. The semiconductor device of claim 8 wherein the moveable microstructure is electrically coupled only to structures underlying the moveable microstructure.

14. A sensor comprising:

a self-test structure overlying a semiconductor substrate used to verify operation of the sensor;

a source region and drain region in the semiconductor substrate; and

a microstructure formed overlying the self-test structure such that when a voltage potential is placed on the self-test structure, the microstructure moves, the self-test structure being between the semiconductor substrate and the microstructure.

15. The sensor of claim 14, wherein the self-test structure comprises a conductive layer.

16. The sensor of claim 14, wherein the self-test structure comprises a doped region in the semiconductor substrate.

17. A semiconductor device comprising:

a semiconductor substrate;

a sensor having a source region and drain region in the semiconductor substrate, and a microstructure overlying the semiconductor substrate, wherein the microstructure comprises a conductive layer;

a transistor having a gate structure, wherein the conductive layer used to form the microstructure is also used to form at least a portion of the gate structure; and

a self-test structure between the semiconductor substrate and the microstructure such that when a voltage potential is placed on the self-test structure, the microstructure moves.

18. The semiconductor device of claim 17, wherein the conductive layer is formed from a layer of polysilicon.

19. The semiconductor device of claim 18, wherein the layer of polysilicon is doped to a resistivity of 5 ohms/sq to 10,000 ohms/sq.

20. The semiconductor device of claim 17, wherein the sensor is an accelerometer.

21. The semiconductor device of claim 17, wherein the self-test structure comprises a conductive layer.

22. The semiconductor device of claim 17, wherein the self-test structure comprises a doped region in the semiconductor substrate.

23. A semiconductor device comprising:

a semiconductor substrate;

a sensor having a source region, a drain region, and a channel region in the semiconductor substrate that are of the same conductivity type; and

a microstructure comprising a conductive layer overlying the semiconductor substrate, wherein the microstructure is electrically coupled solely to the source region, the drain region, and the channel region as the microstructure moves in response to acceleration; and

a transistor having a gate structure, wherein the conductive layer used to form the microstructure is also used to form at least a portion of the gate structure, and the conductive layer used to form the microstructure comprises a same material used to form at least a portion of the gate structure.

24. The semiconductor device of claim 23 wherein the microstructure comprises a first portion and a second portion, the second portion being lower than the first portion.

25. The semiconductor device of claim 24 wherein the second portion of the microstructure is overlying the channel region, and the first portion of the microstructure is at least 9600 Å

higher than the second portion of the microstructure.

26. The semiconductor device of claim 23 wherein a current flow across the channel region is decreased when a first voltage potential is placed between the microstructure and the channel region, a second voltage potential is placed between the source region and the drain region, and the microstructure is moved towards the channel region.