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Rail-to-rail input common mode range differential amplifier that operates with very low rail-to-rail voltages

  • US 5,808,513 A
  • Filed: 12/10/1997
  • Issued: 09/15/1998
  • Est. Priority Date: 08/23/1995
  • Status: Expired due to Term
First Claim
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1. A rail-to-rail input common mode range differential amplifier for amplifying a voltage difference between a pair of differential inputs, the amplifier comprising:

  • a current source stage that outputs first and second tail currents; and

    a differential pair stage that receives the first and second tail currents, outputs first and second intermediate currents, and varies the magnitude of the first and second intermediate currents in response to the voltage difference between the differential inputs; and

    wherein the differential pair stage includes a first pair of MOS transistors of a first conductivity type connected to the current source stage to receive the first tail current, and to the pair of differential inputs such that a first MOS transistor of the first pair of MOS transistors is connected to the first differential input and a second MOS transistor of the first pair of MOS transistors is connected to the second differential input, the first pair of transistors outputting the first and second intermediate currents when the voltages on the first and second differential inputs are in a first voltage range; and

    wherein the differential pair stage includes a second pair of MOS transistors of the first conductivity type connected to the current source stage to receive the second tail current, and to the pair of differential inputs such that a first MOS transistor of the second pair of MOS transistors is connected to the first differential input and a second MOS transistor of the second pair of MOS transistors is connected to the second differential input, the second pair of MOS transistors outputting the first and second intermediate currents when the voltages on the first and second differential inputs are in a second voltage range; and

    wherein the first pair of MOS transistors have a first threshold voltage, andwherein the second pair of MOS transistors have a second threshold voltage different from the first threshold voltage.

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