Device and method for generating multiplexed signals with real time inputs for testing voice grade channels in a demultiplexer

• US 5,812,558 A
• Filed: 01/17/1996
• Issued: 09/22/1998
• Est. Priority Date: 01/17/1996
• Status: Expired due to Fees

• Current Assignee: Xd Semiconductors LLC (Intellectual Ventures LLC)
• Original Assignee: Harris Corporation (L3Harris Technologies, Inc.)
• Inventors: Kimsey, David B., Rotz, Fred B.
• Primary Examiner(s): TU, CHRISTINE TRINH LE
• Application Number:
  US08/586,320
• Time in Patent Office: 979 Days
• Field of Search: 371/20.1, 371/27, 371/2.1, 371/27.5, 370/241, 370/242, 370/464, 370/535, 370/536, 370/542, 370/916
• US Class Current: 714/712
• CPC Class Codes: H04J 3/14 Monitoring arrangements for SDH/SONET rings H04J3/085
• CPC Class Codes: H04L 1/242 by comparing a transmitted test signal with a locally generated replica

Abstract

A device and method for generating a test signal for testing communication system demultiplexing equipment in which voice grade channels are designated to receive a real time input when a test signal is provided to the demultiplexing equipment. A bit stream representing a multiplex of test pattern data is generated and modified by inserting identifiers into the bit stream to indicate portions of the bit stream where real time information is to be inserted. The indicated portions of the modified bit stream are overwritten with the real time input.

Claims

1. A method of generating a test signal for testing communication system demultiplexing equipment, the method comprising the steps of:

(a) identifying, in a multiplexed test signal, information associated with channels that are to receive a real time input when the test signal is provided to the demultiplexing equipment;

(b) providing insertion information bits in parallel to the multiplexed test signal, the insertion information bits including a marker for indicating a bit in the multiplexed test signal that is to be overwritten with a bit from the real time input;

(c) overwriting the marked bit of the multiplexed test signal with a bit from the real time input; and

(d) providing the overwritten test signal to the demultiplexing equipment for test thereof.

2. The method of claim 1 further comprising the steps of including an identifier of a real time source in the insertion information bits, and providing the real time input bit from the identified real time source.

3. The method of claim 2 further comprising the step of including a replacement bit value in the insertion information bits, wherein the replacement bit value is the value of the real time input bit modified by a pseudo-noise bit.

4. The method of claim 2 further comprising the steps of providing the marker in one insertion information bit stream parallel to the multiplexed test signal, and providing the identifier marker in a further insertion information bit stream parallel to the multiplexed test signal.

5. The method of claim 1 further comprising the step of providing the multiplexed test signal in plural parallel streams of bits, and wherein the marker indicates a bit location in the parallel streams that is be overwritten with bits from the real time input.

6. The method of claim 5 further comprising the step of including an identifier of a real time source in the insertion information bits, and providing the real time input bits from the identified real time source.

7. The method of claim 6 further comprising the step of including replacement bit values in the insertion information.

8. The method of claim 7 further comprising the step of modifying the real time input bits with pseudo-noise bits, wherein the replacement bit values are the modified real time input bits.

9. The method of claim 1 further comprising the steps of comparing the marked bit value to the value of the bit from the real time input, and overwriting the marked bit if the two values are not the same.

10. A method of testing a demultiplexer for a communication system with a multiplicity of channels, the method comprising the steps of:

(a) generating a multiplexed test pattern from test information associated with the channels;

(b) storing a modification of the test pattern in which an identification code has been inserted into the generated test pattern to identify one of the channels that is to receive a real time input; and

(c) selectively overwriting portions of the modified test pattern for the identified channel, the overwritten portions including the real time input.

11. The method of claim 10 further comprising the step of providing the predetermined test pattern and the identification code in parallel bit streams.

12. The method of claim 11 further comprising the step of including in the identification code a marker to indicate a specific bit to be overwritten with a bit from the real time input, and a source identifier to indicate a source of the real time input.

13. The method of claim 12 further comprising the step of including in the identification code a bit value that is to replace the value of the specific bit that is to be overwritten.

14. The method of claim 13 further comprising the step of comparing the replacement bit that to the value of the specific bit that is to be overwritten.

15. The method of claim 10 wherein the modification identifies multiple channels that are to receive a real time input.

16. A device for generating a test signal for testing communication system demultiplexing equipment, the device comprising:

a computer for providing a multiplexed test pattern;

a source of real time data;

means for providing a marker in parallel to said multiplexed test pattern for indicating a bit in said test pattern that is to be overwritten with a bit from said source of real time data; and

means for overwriting said marked bit with said bit from said source of real time data responsive to detection of said marker.

17. The device of claim 16 wherein said means for providing further is for providing an identifier for said source of real time data in parallel to said multiplexed test pattern.

18. The device of claim 17 wherein said means for providing further is for providing a replacement bit value in parallel to said multiplexed test pattern.

19. The device of claim 18 further comprising a synchronous additive scrambler for generating a pseudo-noise bit, and means for changing said replacement bit value responsive to said pseudo-noise bit.