Self-scanning light-emitting array

• US 5,814,841 A
• Filed: 04/21/1995
• Issued: 09/29/1998
• Est. Priority Date: 03/18/1988
• Status: Expired due to Term

• Current Assignee: Fuji Xerox Company Limited (Xerox Holdings Corp.)
• Original Assignee: Nippon Sheet Glass Company Limited
• Inventors: Yamashita, Ken, Tanaka, Shuhei, Kusuda, Yukihisa, Tone, Kiyoshi
• Primary Examiner(s): Saadat, Mahshid D.
• Assistant Examiner(s): ARROYO, TERESA M
• Application Number:
  US08/426,060
• Time in Patent Office: 1,257 Days
• Field of Search: 257/113, 257/136, 257/107, 257/146, 257/88, 372/43, 359/298, 224/238
• US Class Current: 257/113
• CPC Class Codes: B41J 2/45 using light-emitting diode [LED] or laser arrays
• CPC Class Codes: B41J 2002/453 self-scanning
• CPC Class Codes: G06K 15/1247 using an array of light sources, e.g. a linear array
• CPC Class Codes: H01L 27/153 in a repetitive configuration, e.g. LED bars
• CPC Class Codes: H01L 27/156 two-dimensional arrays
• CPC Class Codes: H01S 5/042 Electrical excitation ; Circuits therefor monolithically integrated laser drive components H01S5/0261
• CPC Class Codes: H01S 5/4018 Lasers electrically in series
• CPC Class Codes: H01S 5/4025 Array arrangements, e.g. constituted by discrete laser diodes or laser bar H01S5/42 takes precedence
• CPC Class Codes: H01S 5/4031 Edge-emitting structures

Abstract

A self scanning light-emitting array is disclosed. A coupled array of light-emitting elements is constituted so that a light-emitting element in a minimal conducting state influences the next light-emitting element so that its threshold level is changed. When each element is driven by a common clock pulse, the change in threshold level is shifted in the longitudinal direction, so that a minimal conducting state is transferred in a clock period of the clock pulse.

Claims

1. A monolithic light-emitting array comprises:

an array of light-emitting elements having a common substrate and each having a gate and an anode, said light-emitting elements being made of compound semiconductor and including ON state transferring functions;

coupling means for electrically coupling the gate of one of said light-emitting elements to the gate of the next light emitting elements so that the conducting light-emitting element will cause the next light-emitting element to turn on upon applying energy through its anode;

at least two transfer lines each connected to anodes of every at least two light-emitting elements; and

polyphase clock means connected to said transfer lines to provide for transferring a conducting state from one light-emitting element to the next.

2. An array according to claim 1, wherein said clock means develops clock pulses having a leading period and a trailing period, and wherein the trailing period of a clock pulse on a given transfer line overlaps a leading period of the next clock pulse on the next transfer line.

3. An array according to claim 1, wherein pulse width of clock pulses is changed between minimal value corresponding to zero value in n bit digital signal and predetermined value in response to non-zero data in said n bit digital signal where n is a positive integer.

4. A monolithic light-emitting array comprises:

an array of light-emitting elements each having a gate and an anode and including an ON state transferring function;

coupling means for electrically coupling the gate of one of said light emitting elements to the gate of the next light emitting elements so that the minimal conducting light emitting element will cause the next light-emitting element to minimally turn on upon applying energy through its anode;

at least two transfer lines each connected to anodes of every at least two light-emitting elements;

polyphase clock means ORed to said transfer lines to provide for transferring a minimal conducting state from one light-emitting element to the next; and

a current source having outputs each ORed to said transfer line to provide an additional current to said minimal conducting light-emitting element.

5. An array according to claim 4, wherein said light-emitting elements are arranged in one of linear and two-dimensional constitution.

6. An array according to claim 4, wherein said clock means develop clock pulses having a leading period and a trailing period, and wherein the trailing period of a clock pulse on a given transfer line overlaps a leading period of the next clock pulse on the next transfer line.

7. An array according to claim 4, wherein said two-phase clock means is ORed to every other said light-emitting elements through said two transfer lines, and said coupling means being unidirectional means.

8. An array according to claim 4, wherein said three outputs of said clock means are ORed to every three said light-emitting elements through said three transfer lines.

9. An array according to claim 4, further comprising means for shielding light between adjacent light-emitting elements.

10. An array according to claim 4, wherein said coupling means comprises diodes.

11. An array according to claim 4, wherein said coupling means comprises transistors.

12. An array according to claim 4, wherein said light-emitting element has a cell consisting of main and subsidiary light-emitting elements each having an anode and an upper gate, said anode and upper gate of said main light-emitting elements in one cell being connected to those of said subsidiary light-emitting elements in the next cell.

13. An array according to claim 4, wherein said current source comprises luminance control means supplying an analogous current in response to an image signal to cause said minimal conducting light-emitting element to increase its light intensity.

14. An array according to claim 13, wherein a pulse width of said analogous current is wider than that of a clock pulse from said clock means.

15. An array according to claim 4, wherein first said light-emitting element is disposed at a leading end portion of said array and turned on in response to a one-shot pulse at the beginning of self-scanning.

16. An array according to claim 4 wherein said light-emitting element is a laser thyristor having laser beam output emitted perpendicular to the longitudinal direction, and further comprising:

an array of beam deflectors each arranged in front of said laser thyristor to deflect said laser beam output;

means for coupling one gate of said beam deflectors to the next gate thereof so that the minimal conducting state beam deflector cause the next beam deflector to minimally turn on upon applying energy through its anode;

at least two transfer lines each connected to every at least two beam deflectors;

polyphase clock means ORed to said transfer lines to provide a minimal conducting state transferring from said beam deflector to the next; and

a controllable current source having outputs each ORed to said transfer line to provide the controllable current to said minimal conducting state beam deflectors.

17. An array according to claim 16, wherein said beam deflector has first and second anodes arranged at two sides of the laser beam output path, currents having symmetrical magnitude being injected to said first and second anodes of said minimal conducting state beam deflector to form a gradient refractive index distribution in a widthwise direction of the laser beam output path.

18. An array according to claim 17, wherein waveforms of the currents applied to said anodes of said beam deflector are ramp-shaped waveforms having opposite gradient directions, so that output light from the laser thyristor is deflected to the left and right about the center of the output path.

19. An array according to claim 18, wherein said anode of said beam deflector has a thyristor structure, each of two thyristor arrays constituted by the elements comprises a structure equivalent to said coupling means and said clock means provided to said light-emitting array to shift a minimal conducting state in the longitudinal direction, and said clock means of said beam deflector supplies clock pulses synchronous with the clock pulses from said clock means of said laser thyristors to said thyristor arrays and supplies the ramp waveform currents superposed on the clock pulses to said thyristor arrays.

20. An array according to claim 16, wherein said beam deflector comprises a dielectric crystal prism for controlling a refractive index with an electric field.

21. An array according to claim 20, wherein a ramp voltage synchronous with a turn-on shift of said light-emitting array is supplied to said dielectric crystal prism.

22. A self-scanning light-emitting array according to claim 4 in which said coupling means comprises a resistor network for coupling gates for controlling threshold levels of said light-emitting elements in a longitudinal direction.

23. An array according to claim 16, further comprising pull-up resistors for coupling said gates to a voltage line.

24. An array according to claim 16, wherein said resistor network comprises one resistor layer bonded to said gates and a conductor of said constant voltage line and extends in the longitudinal direction.

25. An array according to claim 24, wherein said resistor layer comprises a p-type or n-type semiconductor layer.

26. An array according to claim 4, wherein said light-emitting elements includes a gate layer integral to said coupling resistors having a plurality of notches to optimize the resistance of said coupling resistors.

27. An array according to claim 26, wherein said gate layer extends in the longitudinal direction, and its internal resistance is used as said coupling resistors.

28. An array according to claim 27, wherein a width of said gate layer perpendicular to the longitudinal direction is decreased to adjust a resistance of said resistor network.

29. A self-scanning light-emitting array according to claim 4 in which said coupling means includes a transistor having its base connected to a lower gate of said light-emitting element, and its collector connected to an upper gate of the next said light-emitting element.

30. An array according to claim 29, further comprising a pull-up resistor between the collector of said transistor and a bias line.

31. An array according to claim 4, wherein said light-emitting element comprises a cell consisting of a light-emitting thyristor having upper and lower gates and connected to said transfer line, and a transistor having a base integral to said lower gate so that the output of said transistor in said cell is coupled to said upper gate in the next light-emitting thyristor.

32. An array according to claim 22 or 29, wherein a gate metallization extends to a groove between adjacent light-emitting elements to shield the light coupling therebetween.

33. An array according to claim 22 or 29, wherein said light-emitting element comprises a light-emitting thyristor.

34. An array according to claim 22 or 29, wherein said light-emitting element comprises a laser thyristor.