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MOS high frequency switch circuit using a variable well bias

  • US 5,818,099 A
  • Filed: 10/03/1996
  • Issued: 10/06/1998
  • Est. Priority Date: 10/03/1996
  • Status: Expired due to Fees
First Claim
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1. A radio frequency (RF) switch, comprising:

  • a switching field effect transistor (FET) having gate and back gate terminals, an input port for receiving an RF signal, and an output port for providing substantially said RF signal during an ON state of said FET; and

    switching circuitry for coupling the back gate terminal of said FET to the input port during the ON state to reduce insertion loss during the ON state, and for coupling the back gate terminal to a point of reference potential during an OFF state of said FET to increase isolation during the OFF state;

    wherein said FET is a nFET including a substrate of p type conductivity;

    a first well of n type conductivity within said substrate;

    a second well of p type conductivity within said first well;

    source and drain regions of n type conductivity within said second well;

    a gate electrode;

    a p+ region within said second well, said back gate terminal being electrically connected to said p+ region; and

    a n+ region within said first n type well and outside said second p type well, said n+ region being connected to receive a bias potential to bias the potential of said first well with respect to said substrate.

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