Pseudo differential bus driver/receiver for field programmable devices
First Claim
1. A bus mechanism for a programmable logic device, comprising:
- a small swing transmitter;
a high gain differential amplifier; and
a NMOS cross point switch interconnect network coupling the transmitter and the differential amplifier, wherein a signal is generated by the transmitter as a small swing voltage differential from a reference voltage and the signal is compared to the reference voltage by the differential amplifier.
6 Assignments
0 Petitions
Accused Products
Abstract
A bus mechanism mitigates programmable device performance and power consumption issues by utilizing a small swing transmitter at the source end of an interconnect network and a high gain differential amplifier at the receiver end of the interconnect network. The signal is generated as a small swing voltage differential compared to a reference voltage and the reference voltage is set at a magnitude close to the negative power supply signal (near ground or GND). Because the performance of NMOS cross point switches with signals close to GND is very good, virtually no signal swing is lost in these NMOS cross point switches. The small swing signal voltages also significantly reduce the power dissipated when transmitting data. Transmitter pre-charge, differential amplifier equalization and a PMOS differential amplifier further enhance performance and reduce power consumption. The bus mechanism is well suited to the general requirements of field programmable devices of providing flexible fan-in, flexible fan-out, and unrestricted interconnect through NMOS cross point switches and large interconnect load capacitances.
-
Citations
20 Claims
-
1. A bus mechanism for a programmable logic device, comprising:
-
a small swing transmitter; a high gain differential amplifier; and a NMOS cross point switch interconnect network coupling the transmitter and the differential amplifier, wherein a signal is generated by the transmitter as a small swing voltage differential from a reference voltage and the signal is compared to the reference voltage by the differential amplifier. - View Dependent Claims (2, 3, 4, 5, 6, 7)
-
-
8. A bus mechanism for a programmable logic device, comprising:
-
a transmitter circuit including a signal circuit having a pre-charge device and a pull down device; a reference voltage source associated with the transmitter circuit; a receiver circuit having an equalization circuit and a differential amplifier; and interconnect lines including a reference voltage line and a signal line, each of the interconnect lines having a cross point switch, the signal line coupling the signal circuit to the receiver circuit, the reference voltage line coupling the reference voltage source to the receiver circuit. - View Dependent Claims (9, 10, 11, 12, 13, 14, 15, 16, 17)
-
-
18. A bus method for a programmable logic device, comprising the steps of:
-
generating a signal as a small swing voltage differential from a reference voltage using a small swing transmitter; routing the signal and the reference voltage through a NMOS cross point switch interconnect network coupling the transmitter and a differential amplifier; and comparing the signal to the reference voltage using the differential amplifier. - View Dependent Claims (19, 20)
-
Specification