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High power FET switch

  • US 5,818,283 A
  • Filed: 07/11/1996
  • Issued: 10/06/1998
  • Est. Priority Date: 07/13/1995
  • Status: Expired due to Term
First Claim
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1. An FET switch having an input terminal, an output terminal, and a control terminal, said FET switch maintaining an ON state for transmitting an input signal from said input terminal to said output terminal and an OFF state for preventing transmission of said input signal from said input terminal to said output terminal, said ON signal and said OFF state being controlled by a control voltage supplied to said control terminal, said FET switch comprising:

  • a plurality of FETs each of which has a drain, a source, and a gate which is coupled to said control terminal, said FETS being connected between said input terminal and said output terminal in a multi-stage series configuration; and

    control voltage adjusting means respectively coupling, for each of said FETs, said gate of a respective FET with only one of said drain and said source of said respective FET for adjusting said control voltage in response to said input signal.

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