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Random access memory assembly

  • US 5,819,304 A
  • Filed: 03/24/1997
  • Issued: 10/06/1998
  • Est. Priority Date: 01/29/1996
  • Status: Expired due to Term
First Claim
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1. A random access memory assembly (RAMA) comprising G random access memories (RAMs) identified by the integers from 1 to G, said RAMA having log2 F address lines and G sets of data lines, log2 F being an integer, one set of data lines being associated with each of said RAMs, said RAMA address lines being numbered from 1 to log2 F in order of address bit significance, address line 1 corresponding to the most significant bit, the address lines for RAM H being address lines 1 to log2 (F/NH-1), H taking on every integer value from 1 to G, log2 NH being an integer less than or equal to log2 F, NG being equal to F, N0 being equal to 1, the values of NH being different for different values of H.

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