Through-the-substrate investigation of flip-chip IC's

• US 5,821,549 A
• Filed: 03/03/1997
• Issued: 10/13/1998
• Est. Priority Date: 03/03/1997
• Status: Expired due to Term

• Current Assignee: DCG Systems Incorporated (Thermo Fisher Scientific Incorporated)
• Original Assignee: Schlumberger Technologies Incorporated (Schlumberger NV)
• Inventors: Talbot, Christopher Graham, Brown, James Henry
• Primary Examiner(s): ANDERSON, BRUCE C
• Application Number:
  US08/811,104
• Time in Patent Office: 589 Days
• Field of Search: 250/307, 250/491.1, 250/492.21, 250/309
• US Class Current: 850/62
• CPC Class Codes: H01L 22/12 for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions electrical measurement of diffusions H01L22/14

Abstract

Methods are provided for exposing a selected feature of an IC device, such as a selected conductor, from the back side of the substrate without disturbing adjacent features of the device, such as active regions. One such method comprises: (a) determining a region of the IC device in which the selected feature is located; (b) acquiring from the back side of the substrate an IR optical microscope image of the region; (c) aligning the IR optical microscope image with a coordinate system of a milling system; and (d) using structures visible in the IR optical microscope image as a guide, operating the milling system to expose the selected feature from the back side of the IC device without disturbing adjacent features.

Claims

1. A method of exposing a selected feature of an IC (integrated circuit) device without disturbing adjacent features of the IC device, the IC device having a silicon substrate with a front side and a back side and having on the front side a plurality of structures defining said features, comprising:

a. determining a region of the IC device in which the selected feature is located;

b. acquiring from the back side of the substrate an IR optical microscope image of said region;

c. aligning the IR optical microscope image with a coordinate system of a milling system; and

d. using structures visible in the IR optical microscope image as a guide, operating the milling system to expose the selected feature from the back side of the IC device without disturbing adjacent features.

2. The method of claim 1, further comprising the step, prior to acquiring an IR optical microscope image, of removing material over said region until the subtrate is sufficiently thinned to enable IR (infrared) imaging of structures within said region.

3. The method of claim 2, wherein removing material from the back side of the substrate comprises removing material from the back side of the substrate to substantially thin the substrate wihout penetrating into structures which define featues of the IC device.

4. The method of claim 2, wherein removing material from the back side of the substrate comprises mechanical removal of material by lapping or grinding.

5. The method of claim 2, wherein removing material from the back side of the substrate comprises chemical removal of material.

6. The method of claim 2, wherein removing material from the back side of the substrate comprises thinning the substrate to a thickness of about 100 μ

m to about 200 μ

m.

7. The method of claim 2, wherein removing material from the back side of the substrate comprises polishing the substrate sufficiently to remove surface irregularities which may be visible in an IR optical microscope image of said region.

8. The method of claim 2, wherein removing material from the back side of the substrate comprises scanning a laser beam directed at the back side of the substrate over said region.

9. The method of claim 2, wherein removing material from the back side of the substrate comprises scanning an Argon-ion laser beam directed at the back side of the substrate over said region, and assisting removal of material by introducing a halogen or halogen-containing compound.

10. The method of claim 2, wherein removing material from the back side of the substrate comprises removing said material so as to create topological features on the back side of the substrate, and wherein step b. comprises acquiring an IR optical microscope image of said region which includes said topological features.

11. The method of claim 10, wherein said topological features comprise edges of an opening cut into the back side of the substrate by removal of said material.

12. The method of claim 10, wherein the milling system comprises a FIB (focused ion beam) system, and wherein step c. comprises:

i. acquiring a FIB image of the back side of the device in which said topological features are visible,

ii. selecting a plurality of points on the IR optical microscope image and a corresponding plurality of points on the FIB image, and

iii. aligning the selected points on the IR optical microscope image with the corresponding points of the FIB image.

13. The method of claim 12, wherein step d. comprises operating the FIB system to mill an opening through the back side of the IC device.

14. The method of claim 12, wherein the IC device comprises a multi-layered device having an active-region layer containing a plurality of spaced-apart active regions and a metal layer containing conductive traces which pass between the active regions, the metal layer being more distant from the front side of the substrate than the active-region layer, and wherein step d. comprises operating the FIB system to mill an opening through the back side of the IC device and between active regions of the active-region layer to expose a conductive trace of the metal layer without disturbing the active regions.

15. The method of claim 14, wherein step d. further comprises introducing a halogen-containing compound during milling to selectively enhance the milling of material other than metal.

16. The method of claim 14, further comprising the steps of applying stimulus to the IC device to cause a signal to appear on the exposed conductive trace, and probing the conductive trace to detect the signal on the exposed conductive trace.

17. The method of claim 14, wherein the milling system comprises a FIB system and wherein step c. comprises

i. operating the FIB system to mill through the substrate from the back side to expose features of the IC suitable for alignment of a FIB image of the IC device with the IR optical microscope image,

ii. acquiring a FIB image of the back side of the IC device in which the exposed features are visible,

iii. selecting a plurality of points on the IR optical image corresponding to the exposed features visible in the FIB image, and

iv. aligning the selected points on the IR optical microscope image with the corresponding exposed features visible in the FIB image.