Semiconductor chip package having clip-type outlead and fabrication method of same

• US 5,821,615 A
• Filed: 12/05/1996
• Issued: 10/13/1998
• Est. Priority Date: 12/06/1995
• Status: Expired due to Fees

• Current Assignee: LG Semico Company Limited (SK Hynix Inc.)
• Original Assignee: LG Semico Company Limited (SK Hynix Inc.)
• Inventors: Lee, Byeong-Duck
• Primary Examiner(s): Crane, Sara W.
• Assistant Examiner(s): POTTER, ROY KARL
• Application Number:
  US08/759,210
• Time in Patent Office: 677 Days
• Field of Search: 257/686, 257/723, 257/796, 257/696, 257/692
• US Class Current: 257/686
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/451 with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 23/3121 a substrate forming part of the encapsulation
• CPC Class Codes: H01L 23/4334 Auxiliary members in encapsulations H01L23/49568 takes precedence
• CPC Class Codes: H01L 23/49555 the bent parts being the outer leads
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/15153 the die mounting substrate comprising a recess for hosting the device
• CPC Class Codes: H01L 2924/15165 Monolayer substrate
• CPC Class Codes: H01L 2924/181 Encapsulation
• CPC Class Codes: H01L 33/486 adapted for surface mounting
• CPC Class Codes: H01L 33/62 Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
• CPC Class Codes: H01L 33/642 characterized by the shape
• CPC Class Codes: Y10T 29/4913 Assembling to base an electrical component, e.g., capacitor, etc.
• CPC Class Codes: Y10T 29/49144 by metal fusion
• CPC Class Codes: Y10T 29/49171 : with encapsulating

Abstract

A semiconductor chip package having a clip type lead frame and fabrication thereof. The package includes a semiconductor chip having a plurality of bond pads thereon, a first package body having a recess, a plurality of inner leads each connected electrically to a corresponding one of the bond pads, a plurality of outleads each extended from a corresponding one of the inner leads for covering along sides of the first package body, and a second package body which covers the semiconductor chip, a plurality of metallic wires and the inner leads. The fabrication method includes the steps of forming a first package body having a recess therein, attaching to the first package body a plurality of inner leads and outleads extended from the inner leads thus to be coveringly exposed on sides of the first package body, attaching in the recess a semiconductor chip having a plurality of bond pads thereon, wire-bonding for electrically connecting each of the inner leads by a metallic wire to a corresponding one of the bond pads provided on the semiconductor chip, and forming a second package body for covering the semiconductor chip, the inner leads and the metallic wires.

Claims

1. A semiconductor chip package, comprising:

a first package body having a recess formed on a top surface thereof;

a semiconductor chip attached to the first package body, the semiconductor chip having a plurality of bond pads;

a plurality of leads, each of the leads having an inner portion that is electrically connected to a bond pad of the semiconductor chip and a U-shaped outer portion that extends from the inner portion, wherein a base of each of the U-shaped outer portions covers a side surface portion of the first package body, and wherein legs of each of the U-shaped outer portions cover top and bottom surface portions, respectively, of the first package body;

a plurality of conductive media that couples said plurality of bond pads and said plurality of leads; and

a second package body which covers the semiconductor chip, the plurality of conductive media and the inner portions of the plurality of leads.

2. The semiconductor chip package of claim 1, wherein the outer portions of each of the leads have at least one pocket that extends into the first package body.

3. The semiconductor chip package of claim 1, wherein the outer portions of each of the leads have at least one top pocket that extends into a top surface portion of the first package body and at least one bottom pocket that extends into a bottom surface portion of the first package body.

4. The semiconductor chip package of claim 3, wherein the at least one top pocket and the at least one bottom pocket extend towards one another.

5. The semiconductor chip package of claim 1, further comprising a heat sink, wherein the semiconductor chip is mounted on an upper surface of the heat sink, and wherein a lower surface of the heat sink is exposed.

6. The semiconductor chip package of claim 1, wherein the second package body comprises a resin molded over the semiconductor chip the conductive media and the inner portions of the plurality of leads.

7. The semiconductor chip package of claim 1, wherein said plurality of conductive media comprise a plurality of wires that couple the bond pads of the semiconductor chip and the inner portions of the leads.

8. The semiconductor chip package of claim 7, wherein the second package body comprises a resin molded over the semiconductor chip, the plurality of wires and the inner portions of the plurality of leads.

9. A semiconductor chip package, comprising:

a heat sink having an exposed bottom surface;

a semiconductor chip having bond pads, wherein the semiconductor chip is attached to an upper surface of the heat sink;

a first package body attached to the heat sink;

a plurality of leads that are attached to the first package body, wherein each of the leads includes an inner portion that is electrically connected to a bond pad of the semiconductor chip and an outer portion that extends from the inner portion, and wherein the outer portions of each of the leads cover top, side and bottom surface portions of the first package body;

a plurality of conductive media coupling said plurality of bond pads and leads; and

a second package body which covers the semiconductor chip and the inner portions of the leads.

10. The semiconductor chip package of claim 9, wherein top parts of the outer portions of the leads extend above top surfaces of the first and second package bodies, and wherein bottom parts of the outer portions of the leads extend below bottom surfaces of the first and second package bodies.

11. The semiconductor chip package of claim 9, wherein the outer portions of each of the leads have at least one pocket that extends into the first package body.

12. The semiconductor chip package of claim 9, wherein the outer portions of each of the leads have at least one top pocket that extends into a top surface portion of the first package body and at least one bottom pocket that extends into a bottom surface portion of the first package body.

13. The semiconductor chip package of claim 12, wherein the at least one top pocket and the at least one bottom pocket extend towards one another.