Voltage circuit for preventing voltage fluctuation

• US 5,821,808 A
• Filed: 08/02/1996
• Issued: 10/13/1998
• Est. Priority Date: 08/25/1995
• Status: Expired due to Fees

• Current Assignee: NEC Electronics Corporation (Renesas Electronics Corporation)
• Original Assignee: NEC Corporation
• Inventors: Fujima, Shiro
• Primary Examiner(s): Callahan, Timothy P.
• Assistant Examiner(s): KIM, JUNG H
• Application Number:
  US08/691,395
• Time in Patent Office: 802 Days
• Field of Search: 327/530, 327/538, 327/539, 327/540, 327/541, 327/543, 327/54, 327/73, 327/87, 365/226, 365/227, 326/80, 326/81, 326/63, 326/68
• US Class Current: 327/541
• CPC Class Codes: G11C 11/4074 Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
• CPC Class Codes: G11C 5/147 Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops G11C5/141 takes precedence

Abstract

A voltage circuit for a device having an active period and an inactive period comprises a reference voltage generator generating a reference voltage and a voltage stabilizer receiving the reference voltage. The voltage stabilizer includes first circuit componentry for raising a potential of an output terminal during the active period of the device and second circuit componentry for lowering a potential of the output terminal during at least the inactive period of the device.

Claims

1. A voltage circuit having first and second input terminals, an output terminal and first and second power terminals comprising:

a first comparator having a first input connected to said first input terminal, a second input connected to said output terminal and a first output;

a second comparator having a third input connected to said second input terminal, a fourth input connected to said output terminal and a second output;

a first transistor connected between said output terminal and said first power terminal, said first transistor having a gate electrode connected to said first output; and

a second transistor connected between said output terminal and said second power terminal, said second transistor having a gate electrode connected to said second output.

2. The voltage circuit as claimed in claim 1, wherein said first input terminal is supplied with a first reference voltage, and said second input terminal is supplied with a second reference voltage different from said first reference voltage.

3. The voltage circuit as claimed in claim 2 further comprising:

a third comparator having a fifth input connected to said first input terminal, a sixth input connected to said output terminal and a third output;

a third transistor connected between said output terminal and said first power terminal, said third transistor having a gate electrode connected to said third output.

4. The voltage circuit as claimed in claim 3, wherein said output terminal is connected to a device activated in response to a strobe signal, said device being driven by a voltage between said output terminal and said second power terminal, said first comparator being activated in response to said strobe signal.

5. The voltage circuit as claimed in claim 4, wherein said second comparator is inactivated in response to said strobe signal.

6. The voltage circuit as claimed in claim 5, wherein said device is a DRAM.

7. The voltage circuit as claimed in claim 1, wherein said first transistor has a first gate width, and said second transistor has a second gate width smaller than said first gate width.

8. The voltage circuit as claimed in claim 3, wherein said first transistor has a first gate width, said second transistor having a second gate width smaller than said first gate width, said third transistor having a third gate width smaller than said first gate width.

9. A voltage circuit comprising a first reference voltage generator supplying a first reference voltage to a first reference terminal and a voltage stabilizer including first and second negative feedback loops, each of which is connected between said first reference terminal and an output terminal to prevent said output terminal from having a potential lower than said first reference voltage, said first negative feedback loop having a first driving capacity, said second negative feedback loop having a second driving capacity smaller than said first driving capacity, and a third negative feedback loop connected between said first reference terminal and said output terminal to prevent said output terminal from having a potential higher than said first reference voltage, said third negative feedback loop having a third driving capacity smaller than said first driving capacity.

10. A voltage circuit comprising a first reference voltage generator supplying a first reference voltage to a first reference terminal and a voltage stabilizer including first and second negative feedback loops, each of which is connected between said first reference terminal and an output terminal to prevent said output terminal from having a potential lower than said first reference voltage, said first negative feedback loop having a first driving capacity, said second negative feedback loop having a second driving capacity smaller than said first driving capacity, and a second reference voltage generator supplying a second reference voltage different from said first reference voltage to a second reference terminal, wherein said voltage stabilizer further includes a third negative feedback loop connected between said second reference terminal and said output terminal to prevent said output terminal from having a potential higher than said second reference voltage.

11. The voltage circuit as claimed in claim 10, wherein said first reference voltage is lower than said second reference voltage.

12. The voltage circuit as claimed in claim 11, wherein said third negative feedback loop has a third driving capacity smaller than said first driving capacity.

13. The voltage circuit as claimed in claim 12, wherein said voltage stabilizer is supplied with a control signal taking one of first and second levels, said first level of said control signal activating said first negative feedback loop and inactivating said third negative feedback loop, said second level of said control signal inactivating said first negative feedback loop and activating said third negative feedback loop.

14. A voltage circuit for stabilizing a voltage on a voltage line, comprising:

a comparator having a first input node supplied with said voltage on said voltage line, a second input node supplied with a reference voltage, and an output node;

first and second power lines;

a first transistor coupled between said voltage line and said first power line and having a control electrode coupled to said output node of said comparator; and

a second transistor coupled between said voltage line and said second power line and having a control electrode coupled to said output node of said comparator.

15. The circuit as claimed in claim 14, wherein said first transistor is of a first channel type and said second transistor is of a second channel type opposite to said first channel type so that said first and second transistors are controlled in a complementary manner by said comparator.