Method of separating electronic elements

• US 5,824,595 A
• Filed: 10/03/1996
• Issued: 10/20/1998
• Est. Priority Date: 10/17/1995
• Status: Expired due to Fees

• Current Assignee: Deutsche ITT Industries GmbH (TDK Corporation)
• Original Assignee: Deutsche ITT Industries GmbH (TDK Corporation)
• Inventors: Igel, Gunter, Mall, Martin
• Primary Examiner(s): Niebling, John
• Assistant Examiner(s): Zarneke, David A.
• Application Number:
  US08/720,771
• Time in Patent Office: 747 Days
• Field of Search: 438/33, 438/68, 438/113, 438/114, 438/458, 438/459, 438/460, 438/461, 438/462, 438/463, 438/464, 438/465, 438/759, 438/977, 438/385, 438/386, 438/485, 438/709, 438/710 , 438/734, 438/735, 438/739, 216/72, 216/95
• US Class Current: 438/464
• CPC Class Codes: H01L 21/78 with subsequent division of the substrate into plural individual devices cutting to change the surface-physical characteristics or shape of semiconductor bodies H01L21/304
• CPC Class Codes: Y10S 438/977 Thinning or removal of substrate

Abstract

A method for separating elements associated within a body includes creating a separation region within the body, between the elements, leaving a region of the body which is to be thinned. The method then requires depositing a delay layer on the body, with an opening around the separation region. The delay layer has a predetermined removal rate relative to the removal rate of the body. Lastly, the method requires removing a predetermined amount of the delay layer, the separation region, and the region of the body to be thinned. Preferably, the removing is accomplished by etching, such as plasma etching, and the etch rate of the delay layer is lower than the etch rate for the separation region. In a preferred method, the predetermined removal rate and the positions of the openings in the delay layer are selected so that upon after etching, the elements remaining have a predetermined locus dependent thickness. Alternatively, the delay layers may be formed from the base material, formed from a metallic material or made from a silicon dioxide (SiO₂) material. The base material is preferably a semiconductor wafer and the elements are semiconductor based electronic elements.

Claims

1. A method of separating elements associated within a body during a continuous process of removing material from said body, said method comprising the steps of:

creating a separation region within said body between said elements leaving a region of said body to be thinned;

depositing a delay layer on said body for delaying the removal of material within the region of the body to be thinned, said delay layer having an opening around said separation region and a lower removal rate relative to said body; and

,

removing material from said delay layer, said separation region, and said region of said body to be thinned in said continuous process.

2. The method in accordance with claim 1, wherein said step of removing is accomplished by etching.

3. The method in accordance with claim 2, wherein said etching is plasma etching, and wherein said removal rate of said delay layer is an etch rate lower than an etch rate for said separation region.

4. The method in accordance with claim 1, wherein said step of depositing said delay layer includes interposing said delay layer between said body and said elements.

5. The method in accordance with claim 3 wherein said step of depositing said delay layer includes interposing said delay layer between said body and said elements.

6. The method in accordance with claim 1, wherein said removal rate and the positions of said openings in said delay layer are selected so that upon said step of removing, said elements remaining have a thickness dependent on said removal rate and said positions of said openings.

7. The method in accordance with claim 2, wherein said removal rate is an etch rate and the positions of said opening in said delay layer are selected so that after etching, said elements remaining have a thickness dependent on said removal rate and said positions of said openings.

8. The method in accordance with claim 4, wherein said removal rate is an etch rate and the positions of said openings in said delay layer are selected so that after etching, said elements remaining have a thickness dependent on said removal rate and said positions of said openings.

9. The method in accordance with claim 5 wherein said removal rate is an etch rate and the positions of said openings in said delay layer are selected so that after etching, said elements remaining have a thickness dependent on said removal rate and said positions of said openings.

10. The method in accordance with claim 4, wherein said removal rate and the positions of said openings in said delay layer are selected so that after said step of removing, said elements remaining have a thickness including said delay layer dependent on said removal rate and said positions of said openings.

11. The method in accordance with claim 1, wherein said delay layer is a plurality of layers each having a removal rate when subjected to a removing process.

12. The method in accordance with claim 11, wherein at least one of said plurality of delay layers is made from the material making up said body.

13. The method in accordance with claim 1, wherein said delay layer is made from one of a metallic material and a silicon dioxide material.

14. The method in accordance with claim 1, wherein said body is a semiconductor wafer and said elements are electronic elements.

15. A method of separating electronic elements in a semiconductor wafer and thinning said semiconductor wafer during a continuous process of removing material, comprising:

providing a delay layer for delaying the material--removing process within a semiconductor wafer body region to be thinned, said delay layer having at least one opening to a portion of said semiconductor body defined as a separation region, and

removing material from said separation region of the semiconductor wafer, said delay layer, and said region of the body to be thinned, wherein the removal of material from said separation region separates said electronic elements, and wherein, upon completion of separation, said semiconductor wafer body has been thinned in said continuous process.