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Channel-type stack capacitor for DRAM cell

  • US 5,825,061 A
  • Filed: 12/06/1995
  • Issued: 10/20/1998
  • Est. Priority Date: 12/06/1995
  • Status: Expired due to Term
First Claim
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1. A storage capacitance for dynamic random access memory (DRAM) celL having a word line connected to a gate electrode of a MOSFET, a bit line serving as a first diffusion of said MOSFET, a first electrode of said capacitor connected to a reference potential, comprising:

  • a second electrode of said capacitor connected to a second diffusion of said MOSFET, separated from said first electrode by a dielectric layer, and having a cross-section in the form of at least one shell enclosing a core of a material which can be different from the material for said second electrode,said core traversing from one said memory cell to another said memory in a direction other than the horizontal and vertical dimensions of a rectangular shaped said memory cell.

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