Channel-type stack capacitor for DRAM cell
First Claim
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1. A storage capacitance for dynamic random access memory (DRAM) celL having a word line connected to a gate electrode of a MOSFET, a bit line serving as a first diffusion of said MOSFET, a first electrode of said capacitor connected to a reference potential, comprising:
- a second electrode of said capacitor connected to a second diffusion of said MOSFET, separated from said first electrode by a dielectric layer, and having a cross-section in the form of at least one shell enclosing a core of a material which can be different from the material for said second electrode,said core traversing from one said memory cell to another said memory in a direction other than the horizontal and vertical dimensions of a rectangular shaped said memory cell.
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Abstract
The electrode of a storage capacitor of a DRAM cell lies diagonally along the memory cell. The diagonal layout makes the length of the capacitor longer than either the x-dimension or the y-dimension of the memory cell, thus increasing the storage capacitance.
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12 Claims
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1. A storage capacitance for dynamic random access memory (DRAM) celL having a word line connected to a gate electrode of a MOSFET, a bit line serving as a first diffusion of said MOSFET, a first electrode of said capacitor connected to a reference potential, comprising:
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a second electrode of said capacitor connected to a second diffusion of said MOSFET, separated from said first electrode by a dielectric layer, and having a cross-section in the form of at least one shell enclosing a core of a material which can be different from the material for said second electrode, said core traversing from one said memory cell to another said memory in a direction other than the horizontal and vertical dimensions of a rectangular shaped said memory cell. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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Specification