Integrated circuit arrangement with diode characteristic

• US 5,825,214 A
• Filed: 07/24/1996
• Issued: 10/20/1998
• Est. Priority Date: 10/12/1995
• Status: Expired due to Term

• Current Assignee: Atmel Corporation (Microchip Technology Incorporated)
• Original Assignee: Temic Telefunken Microelectronic GmbH (Continental AG)
• Inventors: Klosa, Klaus
• Primary Examiner(s): Nelms, David C.
• Assistant Examiner(s): Tran, Andrew Q.
• Application Number:
  US08/685,848
• Time in Patent Office: 818 Days
• Field of Search: 327/104, 327/354, 327/303, 327/309, 327/320, 327/327, 327/531
• US Class Current: 327/104
• CPC Class Codes: G05F 1/575 characterised by the feedback circuit
• CPC Class Codes: G06K 19/0723 the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
• CPC Class Codes: G06K 7/0008 General problems related to the reading of electronic memory record carriers, independent of its reading method, e.g. power transfer
• CPC Class Codes: H02M 7/217 using semiconductor devices only

Abstract

An integrated circuit arrangement with a diode characteristic including a source-drain section of a first transistor arranged in the current path between the input and output sides of the arrangement; a first inverter stage with an output fed back to its input, and whose supply voltage is provided by the voltage on the output side of the circuit arrangement; a second inverter stage to the input of which the output signal from the first inverter stage is fed and whose supply voltage is provided by the voltage on the input side of the circuit arrangement; and a third inverter stage having an input to which the output signal from the second inverter stage is fed, whose voltage supply is provided by the voltage on the output side of the circuit arrangement, and whose output signal is fed to the gate electrode of the first transistor, and thus regulates the current flow in the current path of the circuit arrangement.

Claims

1. An integrated circuit arrangement with a diode characteristic comprising:

a first transistor having a source-drain section arranged in a current path between an input and an output of the circuit arrangement and having a gate electrode;

a first inverter stage with an output fed back to an input, and with the supply voltage for the first inverter stage being provided by the voltage at the output of the circuit arrangement;

a second inverter stage having an input connected to receive an output signal from the first inverter stage and with the supply voltage of the second inverter stage being provided by the voltage at the input of the circuit arrangement; and

a third inverter stage having an input connected to receive an output signal from the second inverter stage with the supply voltage for the third inverter stage being provided by the voltage at the output of the circuit arrangement, and with an output signal of the third inverter stage being fed to the gate electrode of the first transistor to regulate the current flow in the current path of the circuit arrangement.

2. An integrated circuit arrangement in accordance with claim 1 wherein each inverter stage consists of a series circuit of source-drain sections of a respective P-channel transistor and a respective N-channel transistor, with a common connection point of the N-channel transistor and the P-channel transistor forming an output of the respective inverter stage, and with a gate electrode of the respective P-channel transistor forming the input of the respective inverter stage.

3. An integrated circuit arrangement in accordance with claim 2, wherein a non-common connection of each P-channel transistor is connected with the potential at one of the input and the output of the circuit arrangement and the non-common connection of each N-channel transistor is connected with a common ground potential.

4. An integrated circuit arrangement in accordance with claim 3 further comprising a further N-channel transistor having a source drain section connected in series with a resistor between the input of the circuit arrangement and the common ground potential, and means connecting the common connection of the resistor and the further N-channel transistor to a gate electrode of each of said N-channel transistors.