Switching circuit at high frequency with low insertion loss

• US 5,825,227 A
• Filed: 01/18/1996
• Issued: 10/20/1998
• Est. Priority Date: 01/23/1995
• Status: Expired due to Term

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Kohama, Kazumasa, Kitakubo, Kazuto
• Primary Examiner(s): Callahan, Timothy P.
• Assistant Examiner(s): LAM, TUAN THIEU
• Application Number:
  US08/588,238
• Time in Patent Office: 1,006 Days
• Field of Search: 327/308, 327/318, 327/427, 327/431, 327/434-437, 333/101, 333/103, 333/262, 333/81 R
• US Class Current: 327/308
• CPC Class Codes: H03K 17/687 the devices being field-effect transistors
• CPC Class Codes: H03K 17/693 Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors logic circuits H03K19/00; code converters H03M5/00, H03M7/00
• CPC Class Codes: H04B 1/48 in circuits for connecting transmitter and receiver to a common transmission path, e.g. by energy of transmitter H04B1/46 takes precedence

Abstract

In a switching circuit, low insertion loss and enough isolation can be ensured at a desired frequency at the same time. An inductor is externally connected in parallel with the path between the drain and source of each of field-effect transistors built in a switching integrated circuit, and the inductor and the OFF capacitance of the field-effect transistor are made to generate parallel resonance. At this time, by suitably adjusting the inductance, low insertion loss and enough isolation are ensured at a desired frequency at the same time.

Claims

1. A switching circuit comprising:

first, second and third input/output terminals,

a first field-effect transistor having drain and source terminals connected to said first and second input/output terminals respectively,

a second field-effect transistor having drain and source terminals connected to said first and third input/output terminals respectively, and

first and second impedance elements connected to gate terminals of said first and second field-effect transistors respectively; and

first and second inductors connecting said first and second input/output terminals to each other and said first and third input/output terminals to each other respectively; and

a third, fourth and fifth impedance elements connected between a bias voltage source and said first, second and third input/output terminals respectively.

2. The switching circuit according to claim 1, wherein said first and second field-effect transistors and said first and second impedance elements are formed as an integrated circuit and said first and second inductors are provided outside said integrated circuit.

3. The switching circuit according to claim 1, further comprising first and second control signals supplied to said gate terminals of said first and second transistors through said first and second impedance elements respectively.

4. The switching circuit according to claim 3, wherein said first and second inductors each have an inductance which is selected in response to a frequency of said first or second control voltage signal respectively.

5. The switching circuit according to claim 1, wherein one or more field-effect transistors are connected in series between one of said first and second field-effect transistors and one of said input/output terminals.

6. The switching circuit according to claim 1, wherein said first and second field-effect transistors are junction field-effect transistors.