Semiconductor integrated circuit device

• US 5,828,107 A
• Filed: 11/08/1996
• Issued: 10/27/1998
• Est. Priority Date: 11/15/1995
• Status: Expired due to Term

• Current Assignee: Adeia Semiconductor Advanced Technologies Inc. (f/k/a Tessera Advanced Technologies, Inc.) (Adeia Inc.)
• Original Assignee: NEC Corporation
• Inventors: Narita, Kaoru
• Primary Examiner(s): Munson, Gene M.
• Application Number:
  US08/748,495
• Time in Patent Office: 718 Days
• Field of Search: 257/358, 257/362, 257/363
• US Class Current: 257/363
• CPC Class Codes: H01L 27/0251 for MOS devices
• CPC Class Codes: H01L 27/0259 using bipolar transistors as protective elements
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

When an element of an internal circuit is arranged in the vicinity of an input/output terminal of an LSI chip, electrostatic break down is caused in an internal circuit element by discharge current generated between an input/output terminal and a grounding terminal or a power source terminal. Therefore, the elements are arranged with a distance to cause dead space therebetween to make down-sizing of the LSI chip difficult. Therefore, a resistor is disposed between an input/output terminal and a protection element connected thereto. The resistor causes increasing of resistance of a current path from the input/output terminal to the grounding terminal, at the common wiring. Thus influence of the electrostatic break down for the element of the internal circuit can be restricted to permit location of the resistor to permit the internal circuit element to be arranged in the vicinity of the protection element of the input/output terminal. Thus, a problem of the dead space can be solved and down-sizing of the LSI is enabled.

Claims

1. A semiconductor integrated circuit device comprising:

an internal circuit formed on a semiconductor substrate;

an signal terminal for supplying an input/output signal of said internal circuit;

a power source supply terminal for supplying a power source for said internal circuit;

a common wiring;

a first protection element provided between said signal terminal and said common wiring for providing prevention of electrostatic break down;

a second protection element provided between said power supply terminal and said common wiring for providing prevention of electrostatic break down; and

a resistor element to be inserted in one of between the signal terminal and the first protection element and between said power supply terminal and said second protection element.

2. A semiconductor integrated circuit device as set forth in claim 1, wherein said power source supply terminal to be a reference terminal, is a grounding terminal.

3. A semiconductor integrated circuit device as set forth in claim 1 wherein said power source supply terminal is a positive or negative voltage power source terminal for supplying an operation power.

4. A semiconductor integrated circuit device as set forth in claim 1, wherein said first protection element is a bipolar element having a pair of first and second diffusion layers of opposite conductive type relative to the semiconductor substrate, said first and second diffusion layers are arranged in spaced apart opposition, the first diffusion layer is connected to said signal terminal, and said second diffusion is connected to a common wiring layer.

5. A semiconductor integrated circuit device as set forth in claim 1, wherein said second protection element is a bipolar element having a pair of third and fourth diffusion layers of opposite conductive type relative to the semiconduction substrate, said third and fourth diffusion layers are arranged in spaced apart opposition, said third diffusion layer is connected to said power source supply terminal, and said fourth diffusion layer is connected respectively to said common wiring.

6. A semiconductor integrated circuit device as set forth in claim 1, wherein said resistor element is a tungsten silicide layer.

7. A semiconductor integrated circuit device as set forth in claim 1, wherein a resistance of a current passage formed between said signal terminal and the power source supply terminal is lower than or equal to 15 Ω

.

8. A semiconductor integrated circuit as set forth in claim 7, wherein a distance D'"'"' between the circuit element of said internal circuit and said signal terminal satisfies

9. A semiconductor integrated circuit device comprising:

an internal circuit formed on a semiconductor substrate;

an signal terminal for supplying an input/output signal of said internal circuit;

first and second power source supply terminals for supply power source for said internal circuit;

a common wiring;

a first protection element provided between said signal terminal and said common wiring for providing prevention of electrostatic break down;

a second protection element provided between said first power supply terminal and said common wiring for providing prevention of electrostatic break down;

a third protection element provided between said second power source supply terminal and said common wiring for providing prevention of electrostatic break down; and

a resistor element inserted between the signal terminal and the first protection element.

10. A semiconductor integrated circuit device as set forth in claim 9, wherein both of said first and second power source supply terminals are grounding terminals.