Current sensing circuit formed in narrow area and having sensing electrode on major surface of semiconductor substrate

• US 5,828,308 A
• Filed: 08/05/1997
• Issued: 10/27/1998
• Est. Priority Date: 08/06/1996
• Status: Expired due to Term

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: NEC Corporation
• Inventors: Fukami, Ikuo
• Primary Examiner(s): Lefkowitz, Edward
• Application Number:
  US08/906,503
• Time in Patent Office: 448 Days
• Field of Search: 340/664, 340/657, 323/312, 323/315, 323/316, 361/93, 361/100, 326/82
• US Class Current: 340/664
• CPC Class Codes: G01R 19/0092 measuring current only all subgroups of G01R19/00 take precedence
• CPC Class Codes: G01R 19/16571 comparing AC or DC current with one threshold, e.g. load current, over-current, surge current or fault current G01R19/16514, G01R19/16519, G01R19/16528, G01R19/16533, G01R19/1659 take precedence; measuring currents by using elements sensitive to the magnetic field generated G01R15/14; measuring earth resistance G01R27/18; testing for leakage or short circuits in electrical apparatus G01R31/52
• CPC Class Codes: H01L 29/0847 of field-effect transistors with insulated gate H01L29/0653 takes precedence; with a passive supplementary region between source or drain and substrate related to punch-through, capacity or isolation phenomena H01L29/1079; with LDD or DDD structure H01L29/7833; for thin film transistors H01L29/78618
• CPC Class Codes: H01L 29/7809 having both source and drain contacts on the same surface, i.e. Up-Drain VDMOS transistors
• CPC Class Codes: H01L 29/7815 with voltage or current sensing structure, e.g. emulator section, overcurrent sensing cell
• CPC Class Codes: H01L 29/7824 with a substrate comprising an insulating layer, e.g. SOI-LDMOS transistors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A current sensing circuit is provided for a current driving transistor to see whether or not excess current flows into an external load, a vertical transistor serves as the current driving transistor and a resistor for converting the amount of driving current to a potential drop, and a drain node connected to a power supply line, and a source node connected to the external load and a sensing node connected to a voltage comparator are provided on a major surface of a semiconductor substrate so as to supply various electric powers through a plurality of current driving transistors respectively accompanied with current sensing circuits and integrated on a single semiconductor chip to the external load.

Claims

1. A current sensing circuit for monitoring a current driving transistor connected at a first current node thereof to a load to see whether or not the amount of driving current is within a standard range, comprising:

a current-to-voltage converter connected between a power voltage line and a second current node of said current driving transistor for producing a potential level variable with the amount of said driving current at said second current node, said current-to-voltage converter and said current driving transistor being implemented by a vertical transistor fabricated on a semiconductor substrate structure having a major surface, said vertical transistor including

a drain region of a first conductivity type formed on said semiconductor substrate and providing said second current node and a sensing node on a first area exposed to said major surface,

a base region of a second conductivity type opposite to said first conductivity type and formed over a second area of said drain region,

a source region of said first conductivity type formed in a central area of said base region and having an area serving as said first current node and exposed to said major surface,

a channel region formed between said drain region and said base region for providing a current path between said drain region and said source region,

a gate insulating layer covering a part of said channel region and a peripheral area of said base region, and

a gate electrode formed on said gate insulating layer;

a reference potential source for producing a constant reference potential level; and

a voltage comparator having two input nodes connected to said sense node and said reference potential source so as to compare said potential level with said reference potential level for producing a signal representative of said driving current out of said standard range.

2. The current sensing circuit as set forth in claim 1, in which said semiconductor substrate structure includes

a first semiconductor layer of said second conductivity type, and

a second semiconductor layer of said first conductivity type epitaxially grown on said first semiconductor layer and providing said major surface, and said drain region includes

a buried layer of said first conductivity type formed in a boundary region between said first semiconductor layer and said second semiconductor layer and larger in dopant concentration than said second semiconductor layer, and a first contact region of said first conductivity type extending from said major surface to said buried layer.

3. The current sensing circuit as set forth in claim 2, in which said first contact region provides said first area where said second current node and said sensing node are provided.

4. The current sensing circuit as set forth in claim 2, in which said drain region further includes a second contact region of said first conductivity type expending from said major surface to said buried layer and spaced from said first contact region, and said second current node and said sensing node are provided on said first contact region and said second contact region, respectively.

5. The current sensing circuit as set forth in claim 1, in which said semiconductor substrate structure includes

a first semiconductor layer providing a part of said major surface and having an upper surface defining a primary recess,

an insulating layer covering said upper surface of said first semiconductor layer so as to define a secondary recess, and

a second semiconductor layer of said first conductivity type filling said secondary recess and providing said major surface and providing another part of said major surface, and

said drain region includes a boundary layer of said first conductivity type formed between said insulating layer and said second semiconductor layer and partially exposed to said major surface.

6. The current sensing circuit as set forth in claim 5, in which said second current node and said sensing node are provided on said boundary layer exposed to said major surface.

7. The current sensing circuit as set forth in claim 5, in which said drain region further includes a contact region of said first conductivity type extending from said major surface of said second semiconductor layer to said boundary layer, and said second current node and said sensing node are provided on said contact region exposed to said major surface.

8. The current sensing circuit as set forth in claim 5, in which said drain region further includes a contact region of said first conductivity type extending from said major surface of said second semiconductor layer to said boundary layer, and said second current node and said sensing node are respectively provided on said boundary layer and said contact region both exposed to said major surface.

9. The current sensing circuit as set forth in claim 1, in which said current-to-voltage converter is implemented by a resistance coupled between the source region and said drain region.