PWN controller use with open loop flyback type DC to AC converter

• US 5,828,558 A
• Filed: 02/11/1998
• Issued: 10/27/1998
• Est. Priority Date: 02/11/1998
• Status: Expired due to Term

• Current Assignee: Microsemi Corp. - Analog Mixed Signal Group, Ltd. (Microchip Technology Incorporated)
• Original Assignee: PowerDsine Limited (Microchip Technology Incorporated)
• Inventors: Ferentz, Alon, Korcharz, Dror
• Primary Examiner(s): BERHANE, ADOLF D
• Application Number:
  US09/022,281
• Time in Patent Office: 258 Days
• Field of Search: 363/20, 363/21, 363/15, 363/16, 363/17, 363/40, 363/41, 363/131, 363/132, 363/89, 363/95, 363/98, 379/164, 379/252, 379/253, 379/418, 379/324, 379/413
• US Class Current: 363/20
• CPC Class Codes: H02M 1/0012 Control circuits using digital or numerical techniques in DC/DC converters H02M3/157, H02M3/33515; in DC-AC converters H02M7/53873
• CPC Class Codes: H02M 1/0022 the disturbance parameters being input voltage fluctuations
• CPC Class Codes: H02M 1/007 Plural converter units in cascade push-pull DC/DC converters with pre-regulator H02M3/3374; DC-AC converters following a DC-DC stage including a high frequency transformer H02M7/4807; DC-AC converters following a DC-DC conversion stage generating periodically varying voltages H02M7/4826
• CPC Class Codes: H02M 1/32 Means for protecting converters other than automatic disconnection
• CPC Class Codes: H02M 3/1588 comprising at least one synchronous rectifier element H02M3/1582, H02M3/1584 take precedence
• CPC Class Codes: H02M 3/33515 with digital control
• CPC Class Codes: H02M 3/33592 having a synchronous rectifier circuit or a synchronous freewheeling circuit at the secondary side of an isolation transformer
• CPC Class Codes: H02M 7/48 using discharge tubes with control electrode or semiconductor devices with control electrode
• CPC Class Codes: H04M 19/02 providing ringing current or supervisory tones, e.g. dialling tone or busy tone
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

A controller and ring generator circuit realized therefrom utilizing an open loop flyback topology to achieve a desired output voltage waveform. A characteristic feature of the controller is that it provides the required signals to control a ring generator circuit having an open loop fly back topology. The controller functions to generate a PWM signal that is used to switch the primary of a transformer on and off. The controller includes the necessary functionality to control the duty cycle of the generated PWM signal so as to produce a sine wave output on the secondary of the transformer. The controller also includes overcurrent protection circuitry that tracks the load current by sensing the current through the primary winding. In addition, the circuit permits negative current in the secondary by use of a synchronous rectifier circuit coupled to an additional secondary transformer winding. An output bridge circuit creates a full sine wave from the generated half wave output.

Claims

1. A controller suitable for controlling an open loop flyback DC to AC converter circuit, said circuit including a transformer having a primary and a secondary, said controller comprising:

sampling means for generating a digital number representative of the magnitude of a source of DC electrical power;

sine generator means for generating a digital representation of a sinusoidal waveform;

processing means for determining the duty cycle of a pulse width modulated (PWM) signal in accordance with the following equation ##EQU28## wherein D=duty cycle of PWM signal

N=turns ratio of said transformer

V_IN =voltage level of said source of DC electrical power

V_OUT =digital representation of a sinusoidal waveform; and

pulse width modulation means for generating said PWM signal in response to the duty cycle generated by said processing means.

2. The controller according to claim 1, wherein said sampling means comprises A/D converter means.

3. The controller according to claim 1, wherein said sampling means comprises:

comparator means for comparing the magnitude of said source of DC electrical power with a converter signal;

a counter responsive to the output of said comparator means;

converter means for generating said converter signal in response to the output of said counter; and

a latch for periodically latching the output of said counter.

4. The controller according to claim 3, wherein said comparator means comprises:

a voltage divider coupled to said source of DC electrical power;

filter means for low pass filtering said converter signal; and

a comparator for comparing the output of said voltage divider and the output of said filter means and generating an compare signal therefrom.

5. The controller according to claim 1, wherein said sine generator means comprises counting means coupled to look up table means.

6. The controller according to claim 1, wherein said sine generator means comprises synchronous state machine means.

7. The controller according to claim 1, wherein said processing means comprises:

a multiplier for generating the product N·

V_IN ;

an adder for generating the sum N·

V_IN +V_OUT ; and

a divider for dividing V_OUT by said sum.

8. The controller according to claim 1, further comprising synchronization means for generating a sequence of pulses in response to both the positive and negative zero crossings of the output sine wave.

9. The controller according to claim 1, further comprising overcurrent protection means operative to reduce the duty cycle of said PWM signal in response to an overcurrent condition in the output of said circuit.

10. The controller according to claim 1, further comprising overcurrent protection means operative to shut down said pulse width modulation means in response to a severe current overload or short circuit applied to the output of said circuit.

11. The controller according to claim 1, further comprising bridge control means for generating a bridge control signal for converting a half wave sine function to a full wave sine function, said bridge control signal having the same frequency as the sine wave output by said circuit.

12. The controller according to claim 1, further comprising buffer means coupled to the output of said pulse width modulation means, said buffer means for generating an output PWM signal with suitable drive and load characteristics.

13. A controller for controlling the operation of a DC to AC converter circuit, said circuit connected to a source of DC electrical power and having an open loop flyback topology including a transformer having a primary winding and a secondary winding, a switch coupled to said primary winding and an output bridge circuit, said controller comprising:

sampling means for generating a digital representation of the voltage level of said source of DC electrical power;

sine generator means for generating a digital representation of a sinusoidal waveform;

processing means for determining the duty cycle of a pulse width modulated (PWM) signal in accordance with the following equation ##EQU29## wherein D=duty cycle of PWM signal

N=turns ratio of said transformer

V_IN =voltage level of said source of DC electrical power

V_OUT =digital representation of a sinusoidal waveform;

pulse width modulation means for generating said PWM signal in response to the duty cycle generated by said processing means, said PWM signal output by said controller and input to said switch; and

bridge control means for generating a bridge control signal output by said controller and input to said output bridge circuit, said output bridge circuit operative to convert a half wave sine function to a full wave sine function subsequently output by said circuit.

14. The controller according to claim 13, further comprising overcurrent protection means operative to reduce the duty cycle of said PWM signal in response to an overcurrent condition in the output of said circuit.

15. The controller according to claim 13, further comprising overcurrent protection means operative to shut down said pulse width modulation means in response to a severe current overload or short circuit applied to the output of said circuit.

16. The controller according to claim 14, wherein said overcurrent protection means comprises:

pulse counting means for counting pulses in response to the current in said primary exceeding a predetermined threshold and generating UP and DOWN signals in accordance thereto;

up/down counter means for incrementing and decrementing a counter in response to said UP and DOWN signals, respectively;

wherein said processing means is adapted to receive and process the output of said up/down counter such that the duty cycle of said PWM signal is adjusted in accordance therewith.

17. The controller according to claim 13, wherein said sampling means comprises A/D converter means.

18. The controller according to claim 13, wherein said sampling means comprises:

comparator means for comparing the magnitude of said source of DC electrical power with a converter signal;

a counter responsive to the output of said comparator means;

converter means for generating said converter signal in response to the output of said counter; and

a latch for periodically latching the output of said counter.

19. The controller according to claim 18, wherein said comparator means comprises:

a voltage divider coupled to said source of DC electrical power;

filter means for low pass filtering said converter signal; and

a comparator for comparing the output of said voltage divider and the output of said filter means and generating an compare signal therefrom.

20. The controller according to claim 13, wherein said sine generator means comprises counting means coupled to look up table means.

21. The controller according to claim 13, wherein said sine generator means comprises synchronous state machine means.

22. The controller according to claim 13, wherein said processing means comprises:

a multiplier for generating the product N·

V_IN ;

an adder for generating the sum N·

V_IN +V_OUT ; and

a divider for dividing V_OUT by said sum.

23. The controller according to claim 13, further comprising synchronization means for generating a sequence of pulses in response to both the positive and negative zero crossings of the output sine wave.

24. The controller according to claim 13, further comprising buffer means coupled to the output of said pulse width modulation means, said buffer means for generating an output PWM signal with suitable drive and load characteristics.

25. A method of controlling a DC to AC converter circuit having an open loop flyback topology, said circuit including a transformer having a primary and a secondary, said method comprising the steps of:

generating a digital number representative of the magnitude of a source of DC electrical power;

generating a digital representation of a sinusoidal waveform;

determining the duty cycle of a pulse width modulated (PWM) signal in accordance with the following equation ##EQU30## wherein D=duty cycle of PWM signal

N=turns ratio of said transformer

V_IN =voltage level of said source of DC electrical power

V_OUT =digital representation of a sinusoidal waveform; and

generating said PWM signal in response to the duty cycle generated by said processing means.

26. The method according to claim 25, wherein said step of generating a digital number comprises:

comparing the magnitude of said source of DC electrical power with a converter signal and maintaining a count in response thereto;

generating said converter signal in response to the magnitude of said count; and

periodically latching the value of said count.

27. The method according to claim 26, wherein said step of comparing comprises:

dividing said source of DC electrical power to generate a divided voltage;

low pass filtering said converter signal and generating a filtered signal therefrom; and

comparing said divided voltage with and said filtered signal and generating a compare signal therefrom.

28. The method according to claim 25, wherein said step of determining comprises:

generating the product N·

V_IN ;

generating the sum N·

V_IN +V_OUT ; and

dividing V_OUT by said sum.

29. The method according to claim 25, further comprising the step of generating a sequence of pulses in response to both the positive and negative zero crossings of the output sine wave.

30. The method according to claim 25, further comprising the step of reducing the duty cycle of said PWM signal in response to an overcurrent condition in the output of said circuit.

31. The method according to claim 25, further comprising the step of suspending the generation of said PWM signal in response to a severe current overload or short circuit applied to the output of said circuit.

32. The method according to claim 25, further comprising the step converting a half wave sine function to a fill wave sine function.

33. The method according to claim 25, further comprising the step of generating an output PWM signal with suitable drive and load characteristics.

34. A method of controlling a DC to DC converter circuit having an open loop flyback topology, said circuit including a transformer having a primary and a secondary, said method comprising the steps of:

generating a digital number representative of the magnitude of a source of DC electrical power;

generating a digital representation of the desired output voltage;

determining the duty cycle of a pulse width modulated (PWM) signal in accordance with the following equation ##EQU31## wherein D=duty cycle of PWM signal

N=turns ratio of said transformer

V_IN =voltage level of said source of DC electrical power

V_OUT =digital representation of the desired output voltage; and

generating said PWM signal in response to the duty cycle generated by said processing means.

35. The method according to claim 34, wherein said step of generating a digital number comprises:

comparing the magnitude of said source of DC electrical power with a converter signal and maintaining a count in response thereto;

generating said converter signal in response to the magnitude of said count; and

periodically latching the value of said count.

36. The method according to claim 35, wherein said step of comparing comprises:

dividing said source of DC electrical power to generate a divided voltage;

low pass filtering said converter signal and generating a filtered signal therefrom; and

comparing said divided voltage with and said filtered signal and generating a compare signal therefrom.

37. The method according to claim 34, wherein said step of determining comprises:

generating the product N·

V_IN ;

generating the sum N·

V_IN +V_OUT ; and

dividing V_OUT by said sum.

38. The method according to claim 34, further comprising the step of reducing the duty cycle of said PWM signal in response to an overcurrent condition in the output of said circuit.

39. The method according to claim 34, further comprising the step of suspending the generation of said PWM signal in response to a severe current overload or short circuit applied to the output of said circuit.

40. The method according to claim 34, further comprising the step of generating an output PWM signal with suitable drive and load characteristics.