Silicon carbide metal-insulator semiconductor field effect transistor
First Claim
1. A silicon carbide metal-insulator semiconductor field effect transistor comprising:
- a u-shaped gate trench;
an n-type silicon carbide drift layer;
a p-type silicon carbide base layer formed by epitaxial growth on said n-type silicon carbide drift layer and having a higher carrier concentration than said silicon carbide drift layer; and
a p-type region formed by ion implantation in said silicon carbide drift layer adjacent to and discontiguous with said u-shaped gate trench and extending to a depth below the bottom of said u-shaped gate trench so as to prevent field crowding at the corner of said gate trench.
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Accused Products
Abstract
A silicon carbide (SiC) metal-insulator semiconductor field effect transistor having a u-shaped gate trench and an n-type SiC drift layer is provided. A p-type region is formed in the SiC drift layer and extends below the bottom of the u-shaped gate trench to prevent field crowding at the corner of the gate trench. A unit cell of a metal-insulator semiconductor transistor is provided having a bulk single crystal SiC substrate of n-type conductivity SiC, a first epitaxial layer of n-type SiC and a second epitaxial layer of p-type SiC. First and second trenches extend downward through the second epitaxial layer and into the first epitaxial layer with a region of n-type SiC between the trenches. An insulator layer is formed in the first trench with the upper surface of the insulator on the bottom of the trench below the second epitaxial layer. A region of p-type SiC is formed in the first epitaxial layer below the second trench. Gate and source contacts are formed in the first and second trenches respectively and a drain contact is formed on the substrate.
153 Citations
13 Claims
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1. A silicon carbide metal-insulator semiconductor field effect transistor comprising:
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a u-shaped gate trench; an n-type silicon carbide drift layer; a p-type silicon carbide base layer formed by epitaxial growth on said n-type silicon carbide drift layer and having a higher carrier concentration than said silicon carbide drift layer; and a p-type region formed by ion implantation in said silicon carbide drift layer adjacent to and discontiguous with said u-shaped gate trench and extending to a depth below the bottom of said u-shaped gate trench so as to prevent field crowding at the corner of said gate trench. - View Dependent Claims (2, 3, 4, 5)
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6. A unit cell of a metal-insulator semiconductor transistor, said unit cell comprising:
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a bulk single crystal silicon carbide substrate of n-type conductivity silicon carbide, said substrate having an upper surface and a lower surface opposite said upper surface; a first epitaxial layer of n-type conductivity silicon carbide formed on said upper surface of said substrate, wherein the carrier concentration of said substrate is higher than the carrier concentration of said first and said second epitaxial layers; a second epitaxial layer of p-type conductivity silicon carbide formed on said first epitaxial layer; a first trench extending downward through said second epitaxial layer and into said first epitaxial layer, said trench having sidewalls and a bottom; a region of n-type conductivity silicon carbide formed in said second epitaxial layer adjacent said first trench and extending to the upper surface of said second epitaxial layer to create a region in said second epitaxial layer having an upper surface of n-type conductivity silicon carbide and wherein said region of n-type conductivity silicon carbide has a higher carrier concentration than said first and said second epitaxial layers; an insulator layer formed on said sidewalls and said bottom of said first trench and extending onto said upper surface of said n-type conductivity silicon carbide formed in said second epitaxial layer to create a gate oxide layer, wherein the upper surface of said gate insulator layer formed on the bottom of said first trench is below said second epitaxial layer; an ohmic contact formed on said lower surface of said substrate to form a drain contact; an ohmic contact formed on said upper surface of said second epitaxial layer and contacting said upper surface of said n-type conductivity region of said second epitaxial layer to form a source contact so as to electrically connect said region of n-type conductivity silicon carbide to said p-type conductivity second epitaxial layer; and a region of p-type conductivity silicon carbide formed by ion implantation in said first epitaxial layer below said source contact adjacent to and discontiguous with said first trench, wherein said region of p-type conductivity silicon carbide has a higher carrier concentration than said second epitaxial layer; a conductive layer formed in said first trench to form a gate contact. - View Dependent Claims (7, 8, 9, 10, 11, 12, 13)
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Specification