×

Self-enabling pulse-trapping circuit

  • US 5,831,932 A
  • Filed: 08/19/1997
  • Issued: 11/03/1998
  • Est. Priority Date: 12/23/1994
  • Status: Expired due to Term
First Claim
Patent Images

1. An integrated memory device comprising:

  • a control signal input for receiving a control signal;

    an address latch input for receiving an address latch signal; and

    means for a latching a transition in the control signal when the address latch signal is activated.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×