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Methods and apparatus for fault diagnosis in self-testable systems

  • US 5,831,992 A
  • Filed: 10/09/1997
  • Issued: 11/03/1998
  • Est. Priority Date: 08/17/1995
  • Status: Expired due to Term
First Claim
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1. A method of diagnosing faults in an integrated circuit the integrated circuit comprising a test vector generator, a programmable data compactor and a secondary data compactor, the method comprising:

  • applying a series of test vectors, for each test vector performing a sequence of test steps;

    capturing scan test response data from each test vector,compressing the test response data using the programmable data compactor to implement a first data compaction function to generate an intermediate signature;

    compressing the intermediate signature in a secondary data compactor;

    clearing the intermediate signature from the programmable data compactor;

    and downloading the content of the secondary data compactor to an external storage for off-line fault analysis after the series of test vectors have been applied;

    and then, after programming the programmable data compactor to implement a different data compaction function, applying another series of test vectors, repeating the sequence of test steps using the different data compaction function;

    for each data compaction function, comparing contents of the secondary data compactor downloaded to external storage with stored values for each series of test to provide diagnostic information for identifying a faulty element in the circuit and an error vector under which the fault occurred.

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