Element-select mechanism for a vector processor

• US 5,832,288 A
• Filed: 10/18/1996
• Issued: 11/03/1998
• Est. Priority Date: 10/18/1996
• Status: Expired due to Term

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Wong, Roney S.
• Primary Examiner(s): Lall, Parshotam S.
• Assistant Examiner(s): Coulter, Kenneth R.
• Application Number:
  US08/733,907
• Time in Patent Office: 746 Days
• Field of Search: 395/800.05, 395/800.04, 395/565
• US Class Current: 712/5
• CPC Class Codes: G06F 15/8084 Special arrangements thereof, e.g. mask or switch
• CPC Class Codes: G06F 9/30018 Bit or string instructions
• CPC Class Codes: G06F 9/30036 Instructions to perform operations on packed data, e.g. vector, tile or matrix operations

Abstract

The present invention supports vector-processor instructions that allow a programmer to specify the size and location of a particular vector element stored in a vector register. A mask generator circuit includes a mask-selector circuit, an index circuit, and a left shifter. The mask-selector circuit decodes a portion of the vector instruction indicating vector-element size and selects a mask appropriate for selecting an element of that size. The index circuit decodes both the vector-size information and that portion of the vector instruction indicating the location of the particular vector element to be masked. The index circuit uses this information to determine the number of places (the "shift count") that the mask must be shifted to correspond to the selected vector element. The shifter, upon receiving the mask and the shift count, shifts the mask by the shift count and provides the resulting output signal to the vector processor. This output signal is then used to select only the vector element specified.

Claims

1. A method of selecting one of a plurality of vector elements stored as a vector within a vector register, wherein each of the vector elements includes at least one multi-bit byte of data, and wherein each of the vector elements is stored at a unique location in the vector register, the method comprising:

receiving a vector instruction indicating the location and the number of bytes of one of the plurality of vector elements in the vector register;

generating a mask configured to select the one of the plurality of vector elements, wherein generating the mask comprises setting a mask bit for each of the number of bytes in the vector element and shifting the set mask bit by a shift count derived from the location indicated by the vector instruction; and

accessing the selected vector element, using the mask, without accessing the non-selected vector elements.

2. A method of selecting one of a plurality of vector elements stored as a vector within a vector register, wherein each of the vector elements includes at least one multi-bit byte of data, and wherein each of the vector elements is stored at a unique location in the vector register, the method comprising:

receiving a vector instruction indicating the location and the number of bytes of one of the plurality of vector elements in the vector register;

generating a mask configured to select the one of the plurality of vector elements; and

accessing the selected vector element, using the mask, without accessing the non-selected vector elements, wherein accessing the selected vector element includes writing new information into the location of the vector register including the vector element without writing to the non-selected vector element locations within the vector register.

3. A method of selecting one of a plurality of vector elements stored as a vector within a vector register, wherein each of the vector elements includes at least one multi-bit byte of data, and wherein each of the vector elements is stored at a unique location in the vector register, the method comprising:

receiving a vector instruction indicating the location and the number of bytes of one of the plurality of vector elements in the vector register;

generating a mask configured to select the one of the plurality of vector elements; and

accessing the selected vector element, using the mask, without accessing the non-selected vector elements, wherein accessing the selected vector element includes reading information from the location of the vector register including the vector element without reading from the non-selected vector element locations within the vector register.

4. A system for selecting one of a plurality of vector elements, the system comprising:

a vector register configured to store a plurality of vector elements, wherein each vector element includes a number of bits;

means for determining the number of bits included in each vector element;

means for providing a mask having at least one mask bit for each of the vector elements in the vector register; and

;

means for accessing the selected vector element, using the mask, without accessing the non-selected vector elements.

5. A mask-generator circuit for selecting one of a plurality of multi-bit vector elements stored within a vector register, the mask-generator circuit comprising:

a mask-selector circuit including;

a mask-selector input terminal configured to receive data indicative of the number of bits of each vector element; and

a mask circuit having a plurality of mask bits, there being at least one mask bit for each of the vector elements in the vector register;

wherein the mask-selector circuit is configured to provide element-select data on at least one mask bit; and

an index circuit having a first input bus configured to receive an index number, an input terminal configured to receive the data, and a shift-count output bus, the index circuit configured to provide a shift-count signal indicative of the number of places to shift the element-select data to select the one of the plurality of multi-bit vector elements.

6. The mask-generator circuit of claim 5, further comprising:

a shifter having a first shifter-input bus connected to the shift-count bus and a second shifter-input bus connected to the mask bus, the shifter configured to shift the stored mask signal on the mask bus by the shift-count specified on the shift-count bus.

7. A method for executing a single instruction in a processor to accesses a selected element of a vector stored in a vector register, the method comprising:

decoding the instruction to determine a specific number of storage locations required to store the selected element, a relative location of the selected element within the vector, and a type of access of the selected element;

generating a mask that identifies which one or more storage locations in the vector register correspond to the selected element, the mask identifying the number of storage location determined from decoding the instruction; and

accessing the one or more storage locations identified by the mask without accessing storage locations that are in the vector register and not identified by the mask.

8. The method of claim 7, wherein generating the mask comprises:

setting bits in the mask wherein bits set in the mask correspond to the number of storage locations determined from the instruction; and

shifting bits of the mask so that the bits set in mask at positions corresponding to the relative location determined from the instruction.