Method for producing display device

• US 5,834,327 A
• Filed: 03/18/1996
• Issued: 11/10/1998
• Est. Priority Date: 03/18/1995
• Status: Expired due to Term

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Nakajima, Setsuo, Arai, Yasuyuki, Yamazaki, Shunpei
• Primary Examiner(s): Niebling, John
• Assistant Examiner(s): LEBENTRITT, MICHAEL
• Application Number:
  US08/618,267
• Time in Patent Office: 967 Days
• Field of Search: 437/86, 437/174, 437/181, 437/40, 148/DIG. 135, 349/187, 349/45, 349/60, 349/122, 349/153, 438/30, 438/613
• US Class Current: 438/30
• CPC Class Codes: G02F 1/133305 Flexible substrates, e.g. plastics, organic film
• CPC Class Codes: G02F 1/13452 Conductors connecting driver circuitry and terminals of panels
• CPC Class Codes: G02F 1/13613 the semiconductor element being formed on a first substrate and thereafter transferred to the final cell substrate
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 2221/68368 used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate
• CPC Class Codes: H01L 2224/24051 Conformal with the semiconductor or solid-state device
• CPC Class Codes: H01L 2224/24226 the HDI interconnect connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the item being planar
• CPC Class Codes: H01L 2224/24998 Reinforcing structures, e.g. ramp-like support
• CPC Class Codes: H01L 2224/82007 involving a permanent auxiliary member being left in the finished device, e.g. aids for holding or protecting a build-up interconnect during or after the bonding process
• CPC Class Codes: H01L 24/24 of an individual high density interconnect connector
• CPC Class Codes: H01L 24/82 by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI] interconnection structure between a plurality of semiconductor chips H01L23/5389
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1218 with a particular composition or structure of the substrate
• CPC Class Codes: H01L 27/1266 the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01011 Sodium [Na]
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01015 Phosphorus [P]
• CPC Class Codes: H01L 2924/01033 Arsenic [As]
• CPC Class Codes: H01L 2924/01049 : Indium [In]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/07811 : Extrinsic, i.e. with electrical conductive fillers
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15788 : Glasses, e.g. amorphous oxides, nitrides or fluorides

Abstract

In a liquid crystal display device, a first substrate includes electrical wirings and a semiconductor integrated circuit which has TFTs and is connected electrically to the electrical wirings, and a second substrate includes a transparent conductive film on a surface thereof. A surface of the first substrate that the electrical wirings are formed is opposite to the transparent conductive film on the second substrate. the semiconductor integrated circuit has substantially the same length as one side of a display screen (i.e., a matrix circuit) of the display device and is obtained by peeling it from another substrate and then forming it on the first substrate. Also, in a liquid crystal display device, a first substrate includes a matrix circuit and a peripheral driver circuit, and a second substrate is opposite to the first substrate, includes a matrix circuit and a peripheral driver circuit and has at least a size corresponding to the matrix circuit and the peripheral driver circuit. Spacers is provided between the first and second substrates. A seal material is formed outside the matrix circuits and the peripheral driver circuits in the first and second substrates. A liquid crystal material is filled inside a region enclosed by the seal material. A protective film is formed on the peripheral driver circuit has substantially a thickness equivalent to an interval between the substrates which is formed by the spacers.

Claims

1. A method of manufacturing a passive type liquid crystal display comprising:

preparing a driver circuit on a temporary substrate;

attaching the driver circuit on the temporary substrate onto a first substrate;

then

removing the temporary substrate from the driver circuit;

forming a liquid crystal material between said first substrate and a second substrate; and

using said first and second substrates, and said liquid crystal material to form a passive type liquid crystal display.

2. The method of claim 1 wherein the first and second substrates are made of plastic.

3. The method of claim 2 wherein the plastic comprises flexible material.

4. A method of manufacturing a passive type liquid crystal display having a pair of first and second substrates and a liquid crystal disposed therebetween, the method comprising the following sequential steps of:

preparing a driver circuit on a temporary substrate;

attaching the driver circuit from the temporary substrate onto the first substrate;

removing the temporary substrate from the driver circuit which is stuck on said temporary substrate;

forming a sealing member on a periphery of one of the first and second substrates; and

then

mating the first and second substrates with the sealing member therebetween,

wherein the sealing member is arranged so as to enclose the liquid crystal and the driver circuit between the first and second substrates.

5. The method of claim 4 wherein the pair of first and second substrates are made of plastic.

6. The method of claim 5 wherein the plastic comprises flexible material.

7. The method of claim 4 wherein said mating the pair of first and second substrates are performed by curing a sealing member while pressing the substrates at 160°

C. for 3 hours.

8. A method of manufacturing a liquid crystal display device having a pair of first and second substrates and a liquid crystal disposed therebetween, comprising:

forming a peeling layer comprising silicon on a glass substrate;

forming an underlying film on the peeling layer;

forming a semiconductor integrated circuit on the underlying film;

forming a passivation film on the semiconductor integrated circuit;

sticking a transfer substrate to the passivation film;

etching the peeling layer by using a mixture of gas comprising ClF₃ and N₂, thereby separating said semiconductor integrated circuit from the glass substrate;

after separating the semiconductor integrated circuit, attaching the semiconductor integrated circuit to one of said first and second substrates with said underlying film therebetween;

removing the transfer substrate from said semiconductor integrated circuit; and

forming an electrode arrangement on said one of the first and second substrates, said electrode arrangement being operationally connected to said semiconductor integrated circuit.

9. The method of claim 8 wherein the liquid crystal display device is a passive type.

10. The method of claim 8 wherein the underlying film comprises silicon oxide.

11. The method of claim 8 wherein the passivation film comprises polyimide resin.

12. The method of claim 8 wherein curing the passivation film is performed under an atmosphere containing N₂ at 300°

C.

13. The method of claim 8 wherein the etching process is performed under a pressure of between 1 and 10 torr at room temperature.

14. The method of claim 8 wherein the transfer substrate is made of plastic.

15. The method of claim 8 wherein the first and second substrates are made of plastic.

16. The method of claim 15 wherein the plastic comprises polyethersulfate having a thickness of 0.3 mm.

17. A method of manufacturing a liquid crystal display device having a pair of first and second substrates and a liquid crystal disposed therebetween, each of said first and second substrates having an electrode arrangement thereon, said method comprising:

forming a peeling layer on a glass substrate;

forming an underlying film on the peeling layer;

forming a semiconductor integrated circuit on the underlying film;

forming at least one passivation film over the semiconductor integrated circuit;

forming a contact hole through the passivation film to expose a portion of said semiconductor integrated circuit;

forming a lead on the passivation film, said lead being electrically connected to said semiconductor integrated circuit through the contact hole;

forming a conductive bump on the lead;

attaching said glass substrate provided with said semiconductor integrated circuit to one of the first and second substrates with an adhesive therebetween, wherein said semiconductor integrated circuit is electrically connected to the electrode arrangement of the one of the first and second substrates through said lead and said conductive bump; and

etching the peeling layer for separating the semiconductor integrated circuit from the glass substrate.

18. The method of claim 17 where the liquid crystal display device is a passive type.

19. The method of claim 17 wherein the peeling layer comprises silicon.

20. The method of claim 17 wherein the passivation film comprises silicon nitride.

21. The method of claim 17 wherein the bump comprises gold.

22. The method of claim 17 wherein the adhesive comprises thermally curable organic resin which is cured under an atmosphere containing N₂ at 120°

C. for 15 minutes.

23. The method of claim 17 wherein etching the peeling layer is performed by using a mixture gas comprising ClF₃ and N₂ under a pressure of 1 to 10 torr at a room temperature.

24. The method of claim 17 wherein the first and second substrates are made of plastic.

25. The method of claim 24 wherein the plastic comprises polyethersulfate having a thickness of 0.3 mm.