Thin film transistor redundancy structure

• US 5,834,970 A
• Filed: 07/01/1997
• Issued: 11/10/1998
• Est. Priority Date: 09/27/1994
• Status: Expired due to Fees

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Manning, Monte
• Primary Examiner(s): Callahan, Timothy P.
• Assistant Examiner(s): Luu, An T.
• Application Number:
  US08/886,582
• Time in Patent Office: 497 Days
• Field of Search: 327/567, 327/518, 327/520, 327/525, 327/526, 327/198
• US Class Current: 327/567
• CPC Class Codes: G11C 17/18 Auxiliary circuits, e.g. for writing into memory
• CPC Class Codes: G11C 29/789 using non-volatile cells or latches

Abstract

In a microcircuit device such as a memory chip, where a bank of state devices such as fuses and anti-fuses determines the enabling and disabling of redundant circuitry, a scheme for blowing one or more state devices by applying a programming voltage through a switching circuit comprising thin film transistors (TFTs) which are not damaged by the device blowing, programming voltage. The TFTs can be activated by a low voltage enable signal provided by a state device designator logic module.

Claims

1. In an integrated circuit having a state device circuit module having a program voltage node for applying a program voltage to a state device within said module, said state device being coupled to said node, said state device circuit module having an output terminal for sensing the state of said state device, circuitry comprising:

means for isolating said program voltage node from said output terminal, said means comprising at least one Thin Film Transistor (TFT) coupled to said program voltage node.

2. The circuitry of claim 1, wherein said means for isolating further comprises at least one TFT coupled to said output terminal.

3. In an integrated circuit having a state device circuit module with a program voltage node to which a program voltage may be applied to program a state device within the module and an output terminal from which the state of the state device may be sensed, isolation circuitry comprising at least one switching device coupled between the program voltage node and the output terminal for isolating the terminal from the node, the switching device being capable of withstanding application of the program voltage substantially without damage.

4. The isolation circuitry of claim 3 wherein the at least one switching device comprises a Thin Film Transistor (TFT) capable of withstanding application of the program voltage substantially without any dielectric breakdown.

5. A state device circuit module comprising:

a state device;

a program voltage terminal coupled to the state device to which a program voltage may be applied for programming the state device;

an output terminal coupled to the state device for outputting the state of the state device; and

isolation circuitry coupled between the program voltage terminal and the output terminal for isolating the output terminal from the program voltage terminal, the isolation circuitry being capable of withstanding application of the program voltage substantially without damage.

6. The state device circuit module of claim 5 wherein the state device is selected from a group comprising a fuse and an anti-fuse.

7. The state device circuit module of claim 5 wherein the isolation circuitry comprises a Thin Film Transistor (TFT).

8. An integrated circuit including a state device circuit module comprising:

a state device;

a program voltage terminal coupled to the state device to which a program voltage may be applied for programming the state device;

an output terminal coupled to the state device for outputting the state of the state device; and

isolation circuitry coupled between the program voltage terminal and the output terminal for isolating the output terminal from the program voltage terminal, the isolation circuitry being capable of withstanding application of the program voltage substantially without damage.

9. Programmable circuitry comprising:

a state device designator logic module; and

a plurality of state device circuit modules coupled to the state device designator logic module, each state device circuit module comprising;

a state device;

a program voltage terminal coupled to the state device to which a program voltage may be applied for programming the state device;

an output terminal coupled to the state device for outputting the state of the state device; and

isolation circuitry coupled between the program voltage terminal and the output terminal for isolating the output terminal from the program voltage terminal, the isolation circuitry being capable of withstanding application of the program voltage substantially without damage.

10. A memory device comprising:

a state device designator logic module;

a plurality of state device circuit modules coupled to the state device designator logic module, each state device circuit module comprising;

a state device;

a program voltage terminal coupled to the state device to which a program voltage may be applied for programming the state device;

an output terminal coupled to the state device for outputting the state of the state device; and

isolation circuitry coupled between the program voltage terminal and the output terminal for isolating the output terminal from the program voltage terminal, the isolation circuitry being capable of withstanding application of the program voltage substantially without damage; and

Random Access Memory (RAM) circuitry coupled to the state device circuit modules.

11. The memory device of claim 10 wherein the RAM circuitry comprises Static RAM (SRAM) circuitry.

12. In an integrated circuit (IC) having a program voltage node to which a program voltage may be applied to program a state device within the IC and a terminal from which the state of the state device may be sensed, a method for protecting circuitry connected to the terminal from the program voltage, the method comprising isolating the terminal from the program voltage node when the program voltage is applied using a switching device capable of withstanding application of the program voltage substantially without damage.

13. The method of claim 12 wherein the step of isolating the terminal comprises isolating the terminal from the program voltage node using a Thin Film Transistor (TFT) coupled between the terminal and the program voltage node.