Method of controlling data writing into on-board microcomputer

• US 5,835,706 A
• Filed: 12/24/1996
• Issued: 11/10/1998
• Est. Priority Date: 01/17/1996
• Status: Expired due to Fees

• Current Assignee: NEC Corporation
• Original Assignee: NEC Corporation
• Inventors: Igaue, Takashi, Hikichi, Hiroshi
• Primary Examiner(s): Beausoliel, Jr., Robert W.
• Assistant Examiner(s): Elisca, Pierre E.
• Application Number:
  US08/772,770
• Time in Patent Office: 686 Days
• Field of Search: 395/185.02, 395/182.12, 395/182.2, 395/182.21, 395/185.04, 364/246.6, 364/266.2, 365/228, 365/226
• US Class Current: 714/49
• CPC Class Codes: G06F 11/073 in a memory management context, e.g. virtual memory or cache management memory management G06F12/00; testing of static memory units G11C29/00
• CPC Class Codes: G06F 11/0793 Remedial or corrective actions recovery from an exception in an instruction pipeline G06F9/3861; by retry G06F11/1402; for recovering from a failure of a protocol instance or entity H04L69/40

Abstract

A user board has an on-board microcomputer including a flash memory and an on-board writing program memory, a user circuit, a reset circuit, a first OR gate, and a second OR gate. A detected signal for resetting the user circuit in an on-board writing mode is supplied from an on-board writing host through the second OR gate to prevent the user circuit from affecting a writing control signal and data to be written into the flash memory.

Claims

1. A method of controlling the writing of data, comprising the steps of:

providing a user board having a user circuit including a serial interface function block and a malfunction monitoring device, an on-board microcomputer including a flash memory which stores a control main program and an on-board writing program memory which stores an on-board writing program and connected to said user circuit through serial interfaces, a reset circuit for generating a reset signal in response to an output signal from said malfunction monitoring device, a first OR gate for ORing said reset signal from said reset circuit and a reset signal supplied from an on-board writing host for rewriting data stored in said flash memory, and a second OR gate for ORing an output signal from said first OR gate and a detected signal indicative of an on-board writing mode from said on-board writing host to reset the user circuit;

supplying a high-voltage signal having a voltage higher than a power supply voltage from said on-board writing host to energize said on-board writing program memory to thereby indicate a start of the on-board writing mode;

transmitting data to be written into said flash memory from said on-board writing host to said on-board microcomputer; and

inhibiting operation of at least a part of said user circuit as long as said detected signal indicates the on-board writing mode.

2. A method according to claim 1, wherein said on-board writing host has an on-board writing detector for generating said detected signal, further comprising the step of outputting said detected signal to said second OR gate when said on-board writing detector detects the on-board writing mode.

3. A method of controlling the writing of data, comprising the steps of:

providing a user board having a user circuit including a serial interface function block and a malfunction monitoring device, an on-board microcomputer including a flash memory which stores a control main program and an on-board writing program memory which stores an on-board writing program and connected to said user circuit through serial interfaces, a reset circuit for generating a reset signal in response to an output signal from said malfunction monitoring device, a first OR gate for ORing said reset signal from said reset circuit and a reset signal supplied from an on-board writing host for rewriting data stored in said flash memory, and a second OR gate for ORing an output signal from said first OR gate and a detected signal indicative of an on-board writing mode from said on-board microcomputer to reset the user circuit;

supplying a high-voltage signal having a voltage higher than a power supply voltage from said on-board writing host to energize said on-board writing program memory to thereby indicate a start of the on-board writing mode;

transmitting data to be written into said flash memory from said on-board writing host to said on-board microcomputer; and

preventing operation of at least a part of said user circuit as long as said detected signal indicates the on-board writing mode.

4. A method according to claim 3, wherein said on-board microcomputer 2 comprises means for generating said detected signal from high-voltage signal supplied from said on-board writing host and supplying the detected signal to said second OR gate.

5. A method of controlling the writing of data, comprising the steps of:

providing a user board having a user circuit including a serial interface function block and a malfunction monitoring device, a reset circuit for generating a reset signal in response to an output signal from said malfunction monitoring device, a first OR gate for ORing said reset signal from said reset circuit and a reset signal supplied from an on-board writing host, and a second OR gate for ORing a detected signal indicative of an on-board writing mode supplied from said high voltage detector and an output signal from said first OR gate, said on-board computer being connected to said user circuit through serial interfaces;

supplying a high-voltage signal having a voltage higher than a power supply voltage from said on-board writing host to energize said on-board writing program memory to thereby indicate a start of the on-board writing mode;

transmitting data to be written into said flash memory from said on-board writing host to said on-board microcomputer; and

preventing operation of at least a part of said user circuit as long as said detected signal indicates the on-board writing mode.

6. A method of controlling the writing of data, comprising the steps of:

providing a user board having a user circuit including a data interface function block, a microcomputer including a memory which stores a program and an on-board writing host;

transmitting data to be written into said memory from said on-board writing host to said on-board microcomputer;

causing the on-board writing host to output a signal indicating an on board writing mode when said transmitting step is being preformed; and

preventing said user circuit from supplying data to said memory as long as said on-board writing host outputs the signal indicating the on-board writing mode.

7. The method of claim 6, wherein the signal indicating an on-board writing mode is generated by an on-board writing detector of the on-board writing host.

8. The method of claim 6, wherein the signal indicating an on-board writing mode is generated using operating software of the on-board writing host.

9. A method of controlling the writing of data, comprising the steps of:

providing a user board having a user circuit including a data interface function block, a microcomputer including a memory which stores a program and an on-board writing host for rewriting data stored in said memory;

transmitting data to be written into said memory from said on-board writing host to said on-board microcomputer;

causing the microcomputer to output a signal indicating an on-board writing mode when said transmitting step is being performed; and

preventing said user circuit from supplying data to said memory as long as said signal indicates the on-board writing mode.