Data pipeline system and data encoding method
First Claim
1. In a video decoding and decompression system having an input, an output and a plurality of processing stages between the input and the output defining a pipeline, the improvement comprising:
- a token generator responsive to a data stream received via said input for generating an interactive interfacing control token, defining a universal adaptation unit, for control and/or data functions among said processing stages, wherein said token is variable in length and is transmitted serially through said processing stages of said pipeline, and wherein said token is altered by a said processing stage;
at least one two wire interface disposed between a preceding member and a succeeding member of a pair of adjacent stages comprising an input data storage device (LDIN) and an output data storage device (LDOUT) in each member of said pair, with an output data storage device of the preceding member connected to an input data storage device of the succeeding member, the combination comprising;
validation circuitry in each said member to generate a validation signal (IN-- VALID, OUT-- VALID) with a first state when data stored therein is valid and with a second state when data stored therein is invalid, said state defining the respective member'"'"'s ability to accept data;
said validation circuitry having at least one validation storage device (LVOUT) to store said validation signal of the respective member of said pair;
said pair of stages being connected by an acceptance line which conveys an acceptance signal (IN-- ACCEPT, OUT-- ACCEPT) indicative of the ability of said succeeding member to load data stored in said preceding member; and
said data storage devices (LDOUT) and validation storage devices (LVOUT) being connected to enabling circuitry to generate an enabling signal to enable loading of data and validation signals into said respective storage devices;
whereby said processing stages are afforded enhanced flexibility in the performance of diverse tasks.
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Abstract
A multi-standard video decompression apparatus has a plurality of stages interconnected by a two-wire interface arranged as a pipeline processing machine. Control tokens and DATA Tokens pass over the single two-wire interface for carrying both control and data in token format. A token decode circuit is positioned in certain of the stages for recognizing certain of the tokens as control tokens pertinent to that stage and for passing unrecognized control tokens along the pipeline. Reconfiguration processing circuits are positioned in selected stages and are responsive to a recognized control token for reconfiguring such stage to handle an identified DATA Token. A wide variety of unique supporting subsystem circuitry and processing techniques are disclosed for implementing the system.
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Citations
41 Claims
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1. In a video decoding and decompression system having an input, an output and a plurality of processing stages between the input and the output defining a pipeline, the improvement comprising:
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a token generator responsive to a data stream received via said input for generating an interactive interfacing control token, defining a universal adaptation unit, for control and/or data functions among said processing stages, wherein said token is variable in length and is transmitted serially through said processing stages of said pipeline, and wherein said token is altered by a said processing stage; at least one two wire interface disposed between a preceding member and a succeeding member of a pair of adjacent stages comprising an input data storage device (LDIN) and an output data storage device (LDOUT) in each member of said pair, with an output data storage device of the preceding member connected to an input data storage device of the succeeding member, the combination comprising; validation circuitry in each said member to generate a validation signal (IN-- VALID, OUT-- VALID) with a first state when data stored therein is valid and with a second state when data stored therein is invalid, said state defining the respective member'"'"'s ability to accept data; said validation circuitry having at least one validation storage device (LVOUT) to store said validation signal of the respective member of said pair; said pair of stages being connected by an acceptance line which conveys an acceptance signal (IN-- ACCEPT, OUT-- ACCEPT) indicative of the ability of said succeeding member to load data stored in said preceding member; and said data storage devices (LDOUT) and validation storage devices (LVOUT) being connected to enabling circuitry to generate an enabling signal to enable loading of data and validation signals into said respective storage devices; whereby said processing stages are afforded enhanced flexibility in the performance of diverse tasks. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 33, 34, 35, 36, 37, 38)
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16. In a video decoding and decompression system having an input, an output and a plurality of processing stages between the input and the output defining a pipeline, the improvement comprising:
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a token generator responsive to a data stream received via said input for generating an interactive interfacing control token, defining a universal adaptation unit, for data functions among said processing stages, wherein said token is variable in length and is transmitted serially through said processing stages of said pipeline, and wherein said token is altered by a said processing stage; a first two wire interface disposed between a preceding member and a succeeding member of a pair of adjacent stages comprising an input data storage device (LDIN) and an output data storage device (LDOUT) in each member of said pair, with an output data storage device of the preceding member connected to an input data storage device of the succeeding member, the combination comprising; validation circuitry in each said member to generate a validation signal (IN-- VALID, OUT-- VALID) with a first state when data stored therein is valid and with a second state when data stored therein is invalid, said state defining the respective member'"'"'s ability to accept data; said validation circuitry having at least one validation storage device (LVOUT) to store said validation signal of the respective member of said pair; said pair of stages being connected by an acceptance line which conveys an acceptance signal (IN-- ACCEPT, OUT-- ACCEPT) indicative of the ability of said succeeding member to load data stored in said preceding member; and said data storage devices (LDOUT) and validation storage devices (LVOUT) being connected to enabling circuitry to generate an enabling signal to enable loading of data and validation signals into said respective storage devices; whereby said processing stages are afforded enhanced flexibility in the processing of data. - View Dependent Claims (17, 18, 32, 39, 40, 41)
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Specification