System for transferring input/output data independently through an input/output bus interface in response to programmable instructions stored in a program memory

• US 5,835,788 A
• Filed: 09/18/1996
• Issued: 11/10/1998
• Est. Priority Date: 09/18/1996
• Status: Expired due to Term

• Current Assignee: Electronics For Imaging Incorporated
• Original Assignee: Electronics For Imaging Incorporated
• Inventors: Blumer, Marc, Ando, Wayne
• Primary Examiner(s): Lee, Thomas C.
• Assistant Examiner(s): Perveen, Rehana
• Application Number:
  US08/716,555
• Time in Patent Office: 783 Days
• Field of Search: 395/842, 395/843, 395/853, 395/885, 395/285
• US Class Current: 710/23
• CPC Class Codes: G06F 13/28 using burst mode transfer, e.g. direct memory access DMA, cycle steal G06F13/32 takes precedence
• CPC Class Codes: G06F 9/3879 for non-native instruction execution, e.g. executing a command; for Java instruction set

Abstract

A programmable DMA controller that uses an instruction set dedicated to moving data efficiently over a bus, comprising a program memory, a program counter, a FIFO memory, a bus buffer, registers, an accumulator, and an ALU. The DMA controller instruction set comprises the following instructions: load, move, add, subtract, branch on zero, branch on not zero, lock, and interrupt. Another DMA controller embodiment uses a SIMD processor. In operation, a CPU downloads DMA programs to the DMA controller. The DMA controller stores these programs in its program memory. The CPU signals the DMA to begin a DMA transfer operation. The ALU and associated devices execute the program instructions to perform the desired DMA transfer. The DMA controller then sends an interrupt to the CPU to indicate the DMA transfer is complete.

Claims

1. An apparatus for transferring data on a bus, comprising:

an input output bus interface adapted to connect to a computer;

a dedicated input output first in first out interface adapted to connect to an external device;

a program memory connected to said input output bus interface for storing a plurality of program instructions;

said program memory capable of receiving a plurality of new program instructions under direction of said computer; and

a processor for processing said new program instructions stored in said program memory to control said data received at said input output bus interface and said data transferred at said dedicated input output first in first out interface, so that said processor can transfer said data through said input output bus interface independent of control over said data by said computer.

2. The apparatus of claim 1 wherein said apparatus for transferring data is a direct memory access controller.

3. The apparatus of claim 1 wherein said program memory can receive said program instructions and said input output bus interface can receive said data from said bus.

4. The apparatus of claim 3 wherein said processor executes direct memory access commands.

5. The apparatus of claim 3 wherein said processor is a single instruction stream multiple data stream.

6. The apparatus of claim 4 wherein said external device is a print engine, and wherein said dedicated input output first in first out interface is used to drive said print engine.

7. The apparatus of claim 4 wherein said external device is an input peripheral and wherein said dedicated input output first in first out interface is used to receive data from said input peripheral.

8. The apparatus of claim 7 wherein said processor further comprises:

addition means for adding data values;

subtraction means for subtracting data values;

byte shift means for shifting data bytes; and

storage means for storing data values.

16. The apparatus of claim 1, wherein said computer comprises:

a chip set;

a central processing unit connected to said chip set; and

a system memory connected to said chip set.

17. The apparatus of claim 7, wherein said processor further comprises:

means for operating on said data.

18. The apparatus of claim 7 wherein said processor further comprises:

addition means for adding data values.

19. The apparatus of claim 7 wherein said processor further comprises:

subtraction means for subtracting data values.

20. The apparatus of claim 7 wherein said processor further comprises:

byte shift means for shifting data bytes.

21. The apparatus of claim 7 wherein said processor further comprises:

storage means for storing data values.

22. The apparatus of claim 17, wherein said means for operating on said data further comprises:

a single register file.

9. A method for transferring data between a computer and an external device across an input output bus comprising the steps of:

downloading program instructions from said computer; and

executing said stored program instructions to controllably transfer said data between said computer and said external device across said input output bus, independent of control over said data by said computer.

10. The method of claim 9 wherein said step of executing said stored program instructions further comprises executing Single Instruction Multiple Data processor type instructions.

11. The method of claim 9 wherein said step of downloading program instructions further comprises downloading program instructions from a central processing unit.

12. The method of claim 11 wherein said step of executing said stored program instructions further comprises executing said stored program instructions to perform a direct memory access transfer.

13. The method of claim 12 wherein said step of executing said program instructions further comprises executing instructions to perform loading, addition, and branching operations.

14. The method of claim 13 wherein said step of executing said program instructions further comprises performing duplex printing operations.

15. The method of claim 13 wherein said step of executing said program instructions further comprises transferring non-contiguous blocks of data in memory to an image compression changing device.

23. An apparatus for transferring data on a bus between a computer and an external device in response to programmable instructions, comprising:

an input output bus interface adapted to connect to said computer for transferring said data between said computer and said input output bus interface;

an input output first in first out interface adapted to connect to said external device for transferring said data between said input output first in first out interface and said external device;

a program memory connected to said input output bus interface for storing a plurality of program instructions;

said program memory capable of receiving and storing a plurality of new program instructions from said computer; and

a processor for processing said new program instructions stored in said program memory and for operating on said data, to controllably transfer said data through said input output bus interface and to controllably transfer said data through said input output first in first out interface, independent of control over said data by said computer.