Mounting structure for a semiconductor circuit

• US 5,838,546 A
• Filed: 04/14/1997
• Issued: 11/17/1998
• Est. Priority Date: 04/12/1996
• Status: Expired due to Fees

• Current Assignee: NEC Corporation
• Original Assignee: NEC Corporation
• Inventors: Miyoshi, Tadayoshi
• Primary Examiner(s): Picard, Leo P.
• Assistant Examiner(s): FOSTER, DAVID A
• Application Number:
  US08/834,163
• Time in Patent Office: 582 Days
• Field of Search: 361/749, 361/813, 174/268, 174/254, 257/735, 257/776
• US Class Current: 361/749
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/451 with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/50 Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
• CPC Class Codes: H01L 2224/85399 Material
• CPC Class Codes: H01L 23/49572 consisting of thin flexible metallic tape with or without a film carrier H01L23/49503 - H01L23/49568 and H01L23/49575 - H01L23/49579 take precedence
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 25/16 the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01078 Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/14 Integrated circuits
• CPC Class Codes: H01L 2924/15312 being a pin array, e.g. PGA
• CPC Class Codes: H01L 2924/181 Encapsulation
• CPC Class Codes: H01L 2924/19041 being a capacitor
• CPC Class Codes: H01L 2924/19105 : in a side-by-side arrangement on a common die mounting substrate
• CPC Class Codes: H01L 2924/207 : Diameter ranges
• CPC Class Codes: H05K 1/141 : One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters H05K1/142 and H05K1/147 take precedence
• CPC Class Codes: H05K 1/181 : associated with surface mounted components
• CPC Class Codes: H05K 1/184 : Components including terminals inserted in holes through the printed circuit board and connected to printed contacts on the walls of the holes or at the edges thereof or protruding over or into the holes
• CPC Class Codes: H05K 1/189 : characterised by the use of a flexible or folded printed circuit H05K3/326 takes precedence
• CPC Class Codes: H05K 2201/0397 : Tab forming integral conductive tabs H05K3/4092
• CPC Class Codes: H05K 2201/0919 : Exposing inner circuit layers or metal planes at the side edge of the PCB or at the walls of large holes shielding provided by an inner layer of PCB H05K2201/0723
• CPC Class Codes: H05K 2201/10674 : Flip chip
• CPC Class Codes: H05K 2201/10704 : Pin grid array [PGA]
• CPC Class Codes: H05K 3/4691 : Rigid-flexible multilayer circuits comprising rigid and flexible layers, e.g. having in the bending regions only flexible layers

Abstract

In a tape carrier package applying a TAB technique, a flex rigid PWB is used as a tape carrier. A flexible portion is provided with a semiconductor connection terminal. An LSI is directly mounted to the flexible portion. A rigid portion is provided with an electrode for mounting a component and an electrode for an external input/output.

Claims

1. A semiconductor mounting structure comprising a flex rigid substrate,

wherein a flex portion is provided with a connection terminal for a semiconductor integrated circuit, the semiconductor integrated circuit being directly connected and mounted to said connection terminal for the semiconductor integrated circuit;

and

wherein the rigid portion of said flex rigid substrate is provided with an external input/output terminal, and the semiconductor integrated circuit is connected and mounted to the mounting substrate by using said external input/output terminal.

2. A semiconductor mounting structure comprising a flex rigid substrate,

wherein a flex portion is provided with a connection terminal for a semiconductor integrated circuit, the semiconductor integrated circuit being directly connected and mounted to said connection terminal for the semiconductor integrated circuit;

wherein said semiconductor integrated circuit is sealed by a resin after mounting said semiconductor integrated circuit; and

wherein a rigid portion of said flex rigid substrate is provided with an electrode for mounting an electronic component, and the electronic component is mounted to said connection terminal for mounting the electronic component.

3. A semiconductor mounting structure comprising a flex rigid substrate,

wherein a flex portion is provided with a connection terminal for a semiconductor integrated circuit, the semiconductor integrated circuit being directly connected and mounted to said connection terminal for the semiconductor integrated circuit;

wherein a rigid portion of said flex rigid substrate is provided with an electrode for mounting an electronic component, and the electronic component is mounted to said connection terminal for mounting the electronic component; and

wherein the rigid portion of said flex rigid substrate is provided with an external input/output terminal, and the semiconductor integrated circuit is connected and mounted to the mounting substrate by using said external input/output terminal.

4. A semiconductor mounting structure comprising a flex rigid substrate,

wherein a flex portion is provided with a connection terminal for a semiconductor integrated circuit, the semiconductor integrated circuit being directly connected and mounted to said connection terminal for the semiconductor integrated circuit;

wherein a plurality of semiconductor integrated circuits are mounted to said flex portion; and

wherein the rigid portion of said flex rigid substrate is provided with an external input/output terminal, and the semiconductor integrated circuit is connected and mounted to the mounting substrate by using said external input/output terminal.

6. The semiconductor mounting structure according to claim 4, wherein a mounting portion of the semiconductor integrated circuit of said flex portion is arranged so that the mounting portion being integrated with the substrate can be adjacent to a cooling means, said semiconductor integrated circuit is adjacent or contacted to said cooling means.

5. A semiconductor mounting structure comprising a flex rigid substrate,

wherein a flex portion is provided with a connection terminal for a semiconductor integrated circuit, the semiconductor integrated circuit being directly connected and mounted to said connection terminal for the semiconductor integrated circuit;

wherein said semiconductor integrated circuit is sealed by a resin after mounting said semiconductor integrated circuit;

wherein a plurality of semiconductor integrated circuits are mounted to said flex portion; and

wherein the rigid portion of said flex rigid substrate is provided with an external input/output terminal, and the semiconductor integrated circuit is connected and mounted to the mounting substrate by using said external input/output terminal.

7. The semiconductor mounting structure according to claim 5, wherein a mounting portion of the semiconductor integrated circuit of said flex portion is arranged so that the mounting portion being integrated with the substrate can be adjacent to a cooling means, said semiconductor integrated circuit is adjacent or contacted to said cooling means.