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Locally asynchronous, pipeline-able logic circuits for true-single-phase synchronous logic circuit

  • US 5,841,298 A
  • Filed: 04/25/1996
  • Issued: 11/24/1998
  • Est. Priority Date: 04/25/1996
  • Status: Expired due to Term
First Claim
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1. A pipeline-able asynchronous logic circuit that implements a subfunction of a logic function that is distributed into multiple sequential subfunctions, each subsequent subfunction being applied to a result of an immediately preceding subfunction of said sequence, said asynchronous logic circuit comprising:

  • an output node,a differential logic circuit connected to said output node via a first path, for applying a particular subfunction to an inputted signal to produce a result signal,a sense amplifier, connected to said output node via a second path that is distinct from said first path, which, in response to being enabled, amplifies said result signal produced by said differential logic circuit and outputs said amplified result signal onto said output node,a pre-charge circuit which pre-charges said output node to a first voltage, but only when said sense amplifier is disabled,a first enable circuit which responds to receiving an enable signal by enabling said sense amplifier and outputting said enable signal only when said sense amplifier outputs said amplified result signal, anda second enable circuit which enables said differential logic circuit in response to receiving said same enable signal that is received at said first enable circuit,wherein said differential logic circuit drives said output node via said first path, and said sense amplifier drives said output node via said second path, to a voltage corresponding to said result signal.

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