Fully-integrated high-speed interleaved voltage-controlled ring oscillator
First Claim
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1. A ring oscillator, comprising:
- at least three mixer cells, each of said mixer cells having a pair of first inputs, a pair of second inputs, a first output, and a second output, said second output being delayed relative to said first output;
each of said mixer cells being symmetrically connected to two other of said mixer cells;
said first pair of inputs of each of said mixer cells being symmetrically connected to said first outputs of said two other of said mixer cells; and
said second pair of inputs of each of said mixer cells being symmetrically connected to said second delayed outputs of said two other of said mixer cells.
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Abstract
An interleaved, tunable ring oscillator is disclosed that produces more output phases without resorting to interpolation. The oscillator is inherently symmetrical and suffers from none of the systematic time errors of an interpolator approach. The oscillator stages are interconnected to allow the oscillating frequency to be higher than the conventional limit of 1/(2*N*TD). Frequency tuning is accomplished by electronically varying the delay of each stage of the ring oscillator. A mixer cell performs a weighted sum of a first input and a second delayed input. The delay ranges from the delay of the mixer itself to the sum of the delays of the mixer and the delay cell.
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Citations
20 Claims
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1. A ring oscillator, comprising:
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at least three mixer cells, each of said mixer cells having a pair of first inputs, a pair of second inputs, a first output, and a second output, said second output being delayed relative to said first output; each of said mixer cells being symmetrically connected to two other of said mixer cells;
said first pair of inputs of each of said mixer cells being symmetrically connected to said first outputs of said two other of said mixer cells; andsaid second pair of inputs of each of said mixer cells being symmetrically connected to said second delayed outputs of said two other of said mixer cells. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A ring oscillator, comprising:
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at least three mixer cells, each of said mixer cells having a pair of first differential inputs, a pair of second differential inputs, a first differential output, and a second differential output delayed relative to said first differential output; each of said mixer cells being symmetrically connected to two other of said mixer cells;
said first differential input pair of each of said mixer cells being symmetrically connected to said first differential outputs of said two other of said mixer cells; andsaid second differential input pair of each of said mixer cells being symmetrically connected to said second delayed differential outputs of said two other of said mixer cells. - View Dependent Claims (9, 10, 11, 12, 13)
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14. A ring oscillator, comprising:
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a first mixer cell having two input pairs, a first output, and a second output delayed relative to said first output; a second mixer cell having two input pairs, a first output, and a second output delayed relative to said first output; a third mixer cell having two input pairs, a first output, and a second output delayed relative to said first output; and a fourth mixer cell having two input pairs, a first output, and a second output delayed relative to said first output; said two input pairs of said third mixer cell being symmetrically connected to said first output and said second delayed outputs of said first and second mixer cells, said two input pairs of said fourth mixer cell being symmetrically connected to said first output and said second delayed outputs of said second and third mixer cells, said two input pairs of said first mixer cell being symmetrically connected to inverted said first output and said second delayed outputs of said third and fourth mixer cells, said two input pairs of said second mixer cell being symmetrically connected to inverted said first output and said second delayed outputs of said fourth mixer cell, and to said first output and said second delayed outputs of said first mixer cell. - View Dependent Claims (15, 16, 17, 18, 19, 20)
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Specification