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Multi-level inverter with low loss snubbing circuits

  • US 5,841,645 A
  • Filed: 04/30/1997
  • Issued: 11/24/1998
  • Est. Priority Date: 06/03/1996
  • Status: Expired due to Fees
First Claim
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1. A multi-level inverter, comprising:

  • an AC output terminal;

    at lease four DC input terminals with different potentials including a first DC input terminal with a maximum potential and a second DC input terminal with a minimum potential;

    a positive arm connected between said first DC input terminal and said AC output terminal;

    a negative arm connected between said second DC input terminal and said AC output terminal;

    each of said positive and negative arms including a plurality of series connected switching devices;

    a plurality of clamp diodes, each corresponding to one of said DC input terminals other than said first and second DC input terminals and also corresponding to one of said positive and negative arms, each of the plurality of clamp diodes connected between the corresponding DC input terminal and the corresponding arm;

    a plurality of first snubber circuits, each corresponding to one of said switching devices and including a series circuit of a snubber capacitor and a snubber diode and connected in parallel with the corresponding one of said switching devices; and

    a plurality of discharging circuits, each corresponding to one of said first snubber circuits and one of said DC input terminals, each of the plurality of discharging circuits including at least a resistor and connected between the corresponding snubber circuit and the corresponding DC input terminals.

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