Methods of forming polycrystalline semiconductor waveguides for optoelectronic integrated circuits, and devices formed thereby

• US 5,841,931 A
• Filed: 11/26/1996
• Issued: 11/24/1998
• Est. Priority Date: 11/26/1996
• Status: Expired due to Fees

• Current Assignee: Massachusetts Institute of Technology
• Original Assignee: Massachusetts Institute of Technology
• Inventors: Kimerling, Lionel C., Black, Marcie R., Foresi, James S., Koker, Debra M., Agarwal, Anu M.
• Primary Examiner(s): Ullah, Akm E.
• Application Number:
  US08/756,812
• Time in Patent Office: 728 Days
• Field of Search: 385/130, 385/131, 385/14, 257/17, 257/20, 257/21, 257/85, 257/98, 257/459, 257/650, 359/248, 438/180, 438/39, 438/571, 438/969, 438/71, 438/97, 427/571, 427/573, 427/575
• US Class Current: 385/131
• CPC Class Codes: G02B 2006/12169 Annealing
• CPC Class Codes: G02B 6/10 of the optical waveguide type G02B6/02, G02B6/24 take precedence; devices or arrangements for the control of light by electric, magnetic, electro-magnetic or acoustic means G02F1/00; transferring the modulation of modulated light G02F2/00; optical logic elements G02F3/00; optical analogue/digital converters G02F7/00
• CPC Class Codes: G02B 6/12004 Combinations of two or more optical elements
• CPC Class Codes: G02B 6/122 Basic optical elements, e.g. light-guiding paths
• CPC Class Codes: G02B 6/132 by deposition of thin films

Abstract

Methods of forming polycrystalline semiconductor waveguides include the steps of forming a first cladding layer (e.g., SiO₂) on a substrate (e.g., silicon) and then forming a polycrystalline semiconductor layer (e.g., poly-Si) on the first cladding layer using a direct deposition technique or by annealing amorphous silicon (a-Si) to form a polycrystalline layer, for example. The deposited polycrystalline semiconductor layer can then be polished at a face thereof to have a root-mean-square (RMS) surface roughness of less than about 6 nm so that waveguides patterned therefrom have loss ratings of better than 35 dB/cm. The polished polycrystalline semiconductor layer is then preferably etched in a plasma to form a plurality of polycrystalline strips. A second cladding layer is then formed on the polycrystalline strips to form a plurality of polycrystalline waveguides which provide relatively low-loss paths for optical communication between one or more optoelectronic devices coupled thereto. The annealed amorphous silicon layer or deposited polycrystalline layer can also be hydrogenated by exposing the second cladding layer to a hydrogen containing plasma at a temperature and pressure of about 350° C. and 0.16 mTorr, respectively, and for a duration in a range between about 30 and 60 minutes. This further improves the loss ratings of the waveguides to about 15 dB/cm or less.

Claims

1. A method of forming a semiconductor waveguide, comprising the steps of:

forming a first cladding layer on a face of a substrate;

forming a polycrystalline semiconductor layer on the first cladding layer;

polishing the polycrystalline semiconductor layer at a face thereof extending opposite the first cladding layer;

forming a second cladding layer on the polished face of the polycrystalline semiconductor layer; and

coupling a source of optical energy to an interior of the polycrystalline semiconductor layer to propagate a signal having a first wavelength therein.

2. The method of claim 1, wherein said polishing step comprises polishing the face of the polycrystalline semiconductor layer to have a root-mean-square surface roughness of less than about 6 nm.

3. The method of claim 2, wherein said step of forming a polycrystalline semiconductor layer comprises forming a polycrystalline silicon layer containing grains smaller than 0.4 μ

m.

4. The method of claim 3, wherein said polishing step comprises polishing the polycrystalline silicon layer to remove sufficient defects from the face so that an energy loss of the signal at a first wavelength of less than about 1.55 μ

m is less than 35 dB/cm.

5. The method of claim 4, wherein said second cladding layer forming step is preceded by the step of exposing the polycrystalline silicon layer to a hydrogen containing plasma.

6. The method of claim 5, wherein said step of forming a second cladding layer comprises forming an electrically insulating layer having an index of refraction less than about 0.7 times an index of refraction of the polycrystalline silicon layer.

7. The method of claim 1, wherein said step of forming a polycrystalline semiconductor layer on the first cladding layer comprises depositing an amorphous semiconductor layer on the first cladding layer and annealing the deposited amorphous semiconductor layer.

8. The method of claim 7, wherein said step of depositing an amorphous semiconductor layer comprises depositing amorphous silicon at a temperature in a range between 475°

C. and 600°

C.

9. The method of claim 8, wherein said annealing step comprises annealing the deposited amorphous silicon at a temperature of about 600°

C.

10. The method of claim 8, wherein said annealing step comprises annealing the deposited amorphous silicon at a temperature of about 1100°

C.

11. The method of claim 2, wherein said step of forming a polycrystalline semiconductor layer comprises depositing a polycrystalline silicon layer at a temperature in a range between 625°

C. and 700°

C.

12. The method of claim 2, wherein said step of forming a polycrystalline semiconductor layer comprises depositing a polycrystalline silicon layer and etching the deposited polycrystalline silicon layer in a plasma containing SF₆, HBr or CF₄, or combinations thereof.

13. The method of claim 5, wherein said exposing step comprises exposing the polycrystalline silicon layer to a hydrogen containing plasma for a sufficient duration so that an energy loss of the signal at the first wavelength is less than 15 dB/cm.

14. The method of claim 13, wherein said exposing step comprises exposing the polycrystalline silicon layer to a hydrogen containing plasma at a temperature of about 350°

C. for a duration in a range between about 30 and 60 minutes.

15. The method of claim 14, wherein said exposing step comprises exposing the polycrystalline silicon layer to a hydrogen containing plasma at a pressure of about 0.16 mTorr in an electron-cyclotron resonance plasma chamber.

16. The method of claim 4, wherein said second cladding layer forming step is followed by the step of exposing the second cladding layer to a hydrogen containing plasma.

17. The method of claim 16, wherein said exposing step comprises exposing the second cladding layer to a hydrogen containing plasma at a temperature of about 350°

C. for a duration in a range between about 30 and 60 minutes.

18. The method of claim 17, wherein said exposing step comprises exposing the second cladding layer to a hydrogen containing plasma at a pressure of about 0.16 mTorr in an electron-cyclotron resonance plasma chamber.

19. A method of forming a semiconductor waveguide, comprising the steps of:

forming a first cladding layer on a face of a substrate;

forming an amorphous semiconductor layer on the first cladding layer;

annealing the amorphous semiconductor layer to convert the amorphous semiconductor layer to a polycrystalline semiconductor layer;

forming a second cladding layer on the polycrystalline semiconductor layer; and

coupling a source of optical energy to an interior of the polycrystalline semiconductor layer to propagate a signal having a first wavelength therein.

20. The method of claim 19, further comprising the step of exposing the second cladding layer to a hydrogen containing plasma to incorporate hydrogen atoms into the polycrystalline semiconductor layer.

21. The method of claim 19, wherein said annealing step comprises annealing the amorphous semiconductor layer at a temperature of about 1100°

C.

22. A method of forming an optoelectronic integrated circuit, comprising the steps of:

forming a layer of polycrystalline silicon on a semiconductor substrate;

polishing a surface of the polycrystalline silicon layer to have a root-mean-square surface roughness of less than about 6 nm;

patterning the polycrystalline silicon layer into a plurality of polycrystalline interconnect waveguides; and

forming a plurality of optoelectronic devices optically coupled to interiors of respective polycrystalline interconnect waveguides.

23. The method of claim 22, further comprising the step of forming a plurality of cladding layers on the plurality of polycrystalline interconnect waveguides, said cladding layers comprising a material having an index of refraction less than about 0.7 times an index of refraction of polycrystalline silicon.

24. The method of claim 22, wherein said cladding layer forming step is followed by the step of exposing the cladding layer to a hydrogen containing plasma to incorporate hydrogen atoms into the polycrystalline interconnect waveguides.

25. The method of claim 23, wherein said step of forming a layer of polycrystalline silicon comprises forming a layer of polycrystalline silicon containing grains therein smaller than 0.4 microns.

26. The method of claim 25, further comprising the step of forming a second plurality of polycrystalline interconnect waveguides on said cladding layers.