Semiconductor device for reducing effects of noise on an internal circuit

• US 5,844,262 A
• Filed: 04/02/1996
• Issued: 12/01/1998
• Est. Priority Date: 05/25/1995
• Status: Expired due to Term

• Current Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Original Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Inventors: Ooishi, Tsukasa
• Primary Examiner(s): MINTEL, WILLIAM A
• Application Number:
  US08/626,406
• Time in Patent Office: 973 Days
• Field of Search: 257/207, 257/208, 257/691, 307/32, 307/42, 327/530, 327/379, 327/535, 361/110, 361/111, 361/622
• US Class Current: 257/207
• CPC Class Codes: G11C 5/147 Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops G11C5/141 takes precedence
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/49175 Parallel arrangements
• CPC Class Codes: H01L 27/0218 of field effect structures
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/13091 Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/30107 Inductance
• CPC Class Codes: H01L 2924/3011 Impedance

Abstract

Semiconductor device according to the present invention includes package frame, bonding wire, pad, first internal power supply line, second internal power supply line, internal circuit, stabilize circuit, GND package frame, GND bonding wire, GND pad, and internal GND line. Bonding wire, pad, and first and second internal power supply lines function as a filter. As a result, noise generated by operation of the internal circuit is absorbed in propagating to the stabilize circuit through first internal power supply line, pad, and the second internal power supply line. Therefore, effects of noise given to the stabilize circuit are small.

Claims

1. A semiconductor device, comprising:

a first internal circuit formed on a semiconductor substrate and causing noise;

a second internal circuit formed on said semiconductor substrate and affected by said noise;

a first power supply potential provision line for providing a first power supply potential;

a second power supply potential provision line having one end connected to said first power supply potential provision line and providing said first internal circuit with said first power supply potential;

a third power supply potential provision line having one end connected to said first power supply potential provision line and providing said second internal circuit with said first power supply potential; and

a first filter provided at said third power supply potential provision line for reducing said noise.

2. The semiconductor device according to claim 1, further comprising:

a fourth power supply potential provision line for providing a second power supply potential different from said first power supply potential;

a fifth power supply potential provision line having one end connected to said fourth power supply potential provision line for providing said first internal circuit with said second power supply potential;

a sixth power supply potential provision line having one end connected to said fourth power supply potential provision line for providing said second internal circuit with said second power supply potential; and

a second filter provided at said sixth power supply potential provision line for reducing said noise.

3. The semiconductor device according to claim 1, further comprising:

a potential fixing layer formed on said semiconductor substrate at a region where said second internal circuit is formed for fixing a potential of said semiconductor substrate at the region where said second internal circuit is formed; and

a fourth power supply potential provision line having one end connected to said third power supply potential provision line and providing said potential fixing layer with said first power supply potential;

wherein

said fourth power supply potential provision line is connected to said third power supply potential provision line through said first filter so that said first power supply potential is provided to said potential fixing layer.

4. The semiconductor device according to claim 1, further comprising:

a potential fixing layer formed on said semiconductor substrate at a region where said second internal circuit is formed for fixing a potential of said semiconductor substrate at the region where said second internal circuit is formed;

a fourth power supply potential provision line having one end connected to said first power supply potential provision line and providing said first power supply potential to said potential fixing layer; and

a third filter provided at said fourth power supply potential provision line for reducing said noise.

5. The semiconductor device according to claim 1, wherein said first filter includes

a resistance element serving as a resistor, and

a capacitive element serving as a capacitor.

6. The semiconductor device according to claim 5, wherein

said resistance element includes a plurality of resistance members connected in series;

said capacitive element includes a plurality of capacitors connected in parallel;

said first filter further includes

a plurality of first fuse elements connected in parallel to said plurality of resistance members, and

a plurality of second fuse elements connected in series to said plurality of capacitors;

wherein

when said first fuse element is blown out, said resistance member corresponding thereto serves as a resistor, and

when said second fuse elements is blown out, said capacitor corresponding thereto does not serve as a capacitor.

7. The semiconductor device according to claim 4, wherein said third filter includes

a resistance element serving as a resistor, and

a capacitive element serving as a capacitor.

8. The semiconductor device according to claim 7, wherein

said resistance element includes a plurality of resistance members connected in series;

said capacitive element includes a plurality of capacitors connected in parallel;

said third filter further includes

a plurality of first fuse elements connected in parallel to said plurality of resistance members, and

a plurality of second fuse elements connected in series to said plurality of capacitors;

wherein

when said first fuse element is blown out, said resistance member corresponding thereto serves as a resistor, and

when said second fuse element is blown out, said capacitor corresponding thereto does not serve as a capacitor.

9. A semiconductor device, comprising:

a first internal circuit causing noise;

a second internal circuit affected by said noise;

internal potential generation means for generating an internal potential;

a first internal potential provision line for providing said internal potential;

a second internal potential provision line having one end connected to said first internal potential provision line and providing said first internal circuit with said internal potential;

a third internal potential provision line having one end connected to said first internal potential provision line and providing said second internal circuit with said internal potential; and

a filter provided at said third internal potential provision line for reducing said noise.

10. A semiconductor device, comprising:

a first internal circuit causing noise;

a second internal circuit affected by said noise;

first internal potential generation means for generating a first internal potential to be provided to said first internal circuit;

second internal potential generation means for generating a second internal potential to be provided to said second internal circuit;

a power supply potential provision line for providing a power supply potential to said first internal potential generation means and said second internal potential generation means;

a first internal potential provision line for providing said first internal circuit with said first internal potential; and

a second internal potential provision line for providing said second internal circuit with said second internal potential.

11. The semiconductor device according to claim 10, wherein said first internal potential generation means includes

third internal potential generation means for generating a third internal potential when said semiconductor device is in an operative state, and

fourth internal potential generation means for generating a fourth internal potential when said semiconductor device is in a standby state;

wherein

said third internal potential is said first internal potential when said semiconductor device is in an operative state;

said fourth internal potential is said first internal potential when said semiconductor device is in the standby state;

said first internal potential provision line includes

a third internal potential provision line for providing said third internal potential,

a fourth internal potential provision line for providing said fourth internal potential,

a fifth internal potential provision line for providing said third and fourth internal potentials;

wherein

respective one ends of said third internal potential provision line, said fourth internal potential provision line and said fifth internal potential provision line are connected in common;

said fifth internal potential provision line has another end connected to said first internal circuit; and

said second internal potential generation means provides said second internal circuit with said second internal potential when said semiconductor device is in the standby state.

12. A semiconductor device, comprising:

a first internal circuit causing noise;

a second internal circuit affected by said noise;

first internal potential generation means for generating a first internal potential to be provided to said first internal circuit;

a first internal potential provision line for providing said first internal potential to said first internal circuit;

second internal potential generation means for generating a second internal potential to be provided selectively to said second internal circuit or both said first and second internal circuits;

a second internal potential provision line for providing said second internal potential selectively to said second internal circuit or both said first and second internal circuits; and

connection control means for controlling connection of said first internal circuit with said first internal potential provision line or said second internal potential provision line in accordance with a state of said semiconductor device.

13. The semiconductor device according to claim 12, wherein said connection control means disconnects said first internal circuit and said second internal potential provision line and connects said first internal circuit and said first internal potential provision line when said semiconductor device is in an operative state, and

said connection control means disconnects said first internal circuit and said first internal potential provision line and connects said first internal circuit and said second internal potential provision line when said semiconductor device is in a standby state.

14. A semiconductor device, comprising:

a first internal circuit causing noise;

a second internal circuit affected by said noise;

first internal potential generation means for generating a first internal potential to be provided to said first internal circuit and said second internal circuit when said semiconductor device is in an operative state;

second internal potential generation means for generating a second internal potential to be provided to said first and second internal circuits when said semiconductor device is in a standby state;

a first internal potential provision line for providing said first internal potential;

a second internal potential provision line for providing said second internal potential;

a third internal potential provision line connected between said first internal potential provision line and said second internal potential provision line; and

a filter provided at said third internal potential provision line for reducing said noise;

wherein

said third internal potential provision line provides one of said first and second internal potentials.

15. A semiconductor device, comprising:

a first internal circuit causing first noise;

a second internal circuit affected by said first noise;

first internal potential generation means for generating a first internal potential to be provided to said first internal circuit;

second internal potential generation means for generating a second internal potential to be provided to said second internal circuit;

a first internal potential provision line for connecting said first internal potential generation means and said first internal circuit and providing said first internal potential;

a second internal potential provision line for connecting said second internal potential generation means and said second internal circuit and providing said second internal potential; and

first connection control means provided between said first and second internal potential provision lines for controlling connection between said first and second internal potential provision lines in accordance with a state of said semiconductor device.

16. The semiconductor device according to claim 15, wherein

said first connection control means disconnects said first internal potential provision line and said second internal potential provision line when said semiconductor device is in a first state,

said first connection control means connects said first internal potential provision line with said second internal potential provision line when said semiconductor device is in a second state, and

said second internal potential generation means also provides said first internal circuit with said second internal potential when said semiconductor device is in said second state.

17. The semiconductor device according to claim 16, wherein

said first state is an operative state of said semiconductor device,

said second state is a standby state of said semiconductor device, and

said first internal potential generation means is stopped in said standby state.

18. The semiconductor device according to claim 16, wherein

said first state is a first operative state of said semiconductor device, and

said second state is a second operative state of said semiconductor device.

19. The semiconductor device according to claim 15, further comprising a resistance element connected between said first internal potential provision line and said second internal potential provision line.

20. The semiconductor device according to claim 15, further comprising:

a third internal circuit causing second noise;

third internal potential generation means for generating a third internal potential to be provided to said third internal circuit;

a third internal potential provision line for connecting said third internal potential generation means and said internal circuit and providing said third internal potential; and

second connection control means provided between said second and third internal potential provision lines and controlling connection between said second and third internal potential provision lines in accordance with a state of said semiconductor device.

21. The semiconductor device according to claim 20, further comprising a resistance element connected between said second and third internal potential provision lines.

22. The semiconductor device according to claim 15, further comprising:

a third internal circuit causing second noise;

third internal potential generation means for generating a third internal potential to be provided to said third internal circuit;

a third internal potential provision line for connecting said third internal circuit and said third internal potential generation means and providing said third internal potential; and

second connection control means provided between said first and third internal potential provision lines for controlling connection between said first and third internal potential provision lines in accordance with a state of said semiconductor device.

23. A semiconductor device, comprising:

a first internal circuit affected by noise;

a first potential provision member for providing a potential to said first internal circuit;

an internal lead connected in series with said first potential provision member for providing said potential to said first internal circuit; and

a second potential provision member connected in series with said internal lead for providing said potential to said first internal circuit;

wherein

said internal lead does not have a connection portion with outside of said semiconductor device for providing and receiving a voltage to and from the outside of said semiconductor device and is thicker than an internal interconnection of said semiconductor device.

24. The semiconductor device according to claim 23, further comprising:

a second internal circuit causing said noise;

internal potential generation means for generating an internal potential to be provided to said second internal circuit; and

potential provision means for providing said potential to said first internal circuit and said internal potential generation means from the outside of said semiconductor device;

wherein

said first potential provision member is connected to said potential provision means.

25. The semiconductor device according to claim 23, wherein

said first potential provision member or said second potential provision member is a wire having inductance.

26. A semiconductor device, comprising:

an external lead having a connection portion with outside for directly providing and receiving a voltage to and from the outside of said semiconductor device; and

an internal lead which does not have a connection portion with the outside for directly providing and receiving a voltage to and from the outside of said semiconductor device;

wherein

said external lead and said internal lead are thicker than an internal interconnection of said semiconductor device.

27. The semiconductor device according to claim 26, wherein

said external lead is provided at a first layer, and

said internal lead is provided at a second layer.

28. The semiconductor device according to claim 27, wherein

said internal lead includes a first internal lead and a plurality of second internal leads branched from said first internal lead.

29. The semiconductor device according to claim 28, further comprising an internal circuit for providing and receiving a voltage to and from said internal lead, wherein

said external lead and said internal lead are provided at an upper layer of said internal circuit to avoid direct contact with said internal circuit, and

said semiconductor device further comprising a connection member for connecting said internal lead and said internal circuit to avoid contact with said external lead.

30. The semiconductor device according to claim 27, wherein said internal lead forms at least one frame.

31. The semiconductor device according to claim 30, further comprising an internal circuit for providing and receiving a voltage to and from said internal lead, wherein

said external lead and said internal lead are provided at an upper layer of said internal circuit to avoid direct contact with said internal circuit, and

said semiconductor device further comprising a connection member for connecting said internal lead and said internal circuit to avoid contact with said external lead.

32. A semiconductor apparatus comprising:

a semiconductor device contained within a package and having an internal interconnection formed thereon;

an external lead thicker than said internal interconnection and partially exposed to outside of said package;

an internal lead thicker than said internal interconnection and wholly buried inside of said package; and

a wire connected between said external lead and said internal lead.

33. A semiconductor apparatus comprising:

a semiconductor device contained within a package and having an internal interconnection formed thereon;

an external lead thicker than said internal interconnection and partially exposed to outside of said package; and

an internal lead thicker than said internal interconnection and wholly buried inside of said package wherein

said external lead receives an external power supply potential,

said semiconductor device includes

an internal potential generating circuit receiving said external power supply potential from said internal lead and generating an internal potential different from said external power supply potential.

34. A semiconductor apparatus comprising:

a semiconductor device contained within a package and having an internal interconnection formed thereon;

an external lead thicker than said internal interconnection and partially exposed to outside of said package; and

an internal lead thicker than said internal interconnection and wholly buried inside of said package wherein

said external lead receives an external power supply potential,

said semiconductor device includes

an internal potential generating circuit connected to said internal lead, generating and providing an internal potential different from said external power supply potential to said internal lead.

35. The semiconductor apparatus according to claim 34, wherein said semiconductor device further includes

an internal circuit connected to said internal lead and operating in response to said internal potential from said internal lead.