Monolithic integrated sensor circuit

• US 5,844,427 A
• Filed: 02/26/1997
• Issued: 12/01/1998
• Est. Priority Date: 03/02/1996
• Status: Expired due to Term

• Current Assignee: Micronas Intermetall GmbH (TDK Corporation)
• Original Assignee: Deutsche ITT Industries GmbH (TDK Corporation)
• Inventors: Motz, Mario, Theus, Ulrich
• Primary Examiner(s): TON, MY TRANG
• Application Number:
  US08/806,905
• Time in Patent Office: 643 Days
• Field of Search: 327/51, 327/52, 327/54, 327/67, 327/84, 327/89, 327/92, 327/72, 327/73, 327/423, 327/511, 327/244-247, 324/251, 324/117 H, 324/207.2, 338/32 H
• US Class Current: 327/51
• CPC Class Codes: G01D 3/02 with provision for altering or correcting the law of variation
• CPC Class Codes: G01D 5/142 using Hall-effect devices measuring magnetic variables using Hall-effect or other galvanomagnetic devices G01R33/06

Abstract

A monolithic integrated sensor circuit is disclosed comprising a sensor system for generating an electronic sensor signal; a supply unit for the sensor system; an amplifying stage for amplifying the sensor signal; a plurality of inverting devices in the signal path of the amplifying stage which reverse the polarity of the sensor signal at equal time intervals, the time intervals and inversion of the sensor signal being controlled by a clock signal source; and an averaging combiner stage whose input receives an amplified sensor signal and whose output has a reference polarity which is controlled by means of the inverting devices in such a way as to be always the same regardless of the switching state in the signal path. The monolithic integrated sensor circuit of the present invention minimizes the offset error.

Claims

1. A monolithic integrated sensor circuit comprising:

a sensor system for generating a sensor signal;

a supply unit for generating current for the sensor system;

an amplifying stage for amplifying the sensor signal generated by the sensor system;

wherein the amplifying stage comprises an input amplifier and an output stage amplifier, and wherein the output stage amplifier receives an amplified sensor signal and produces an output signal having a reference polarity which is controlled by a plurality of inverting means; and

the plurality of inverting means for periodically reversing the polarity of the sensor signal at equal time intervals coupled to a signal path of the amplifying stage, with one of said plurality of inverting means being connected between the input amplifier and the output stage amplifier.

2. The monolithic integrated sensor circuit of claim 1, wherein the plurality of inverting means reverse the polarity of the sensor signal by means of a switching clock from a clock signal source.

3. The monolithic integrated sensor circuit of claim 2, wherein the plurality of inverting means control the reference polarity of the sensor signal in such a way as to be always the same regardless of a switching state in the signal path.

4. The monolithic integrated sensor circuit of claim 3, wherein the sensor system comprises a differential-sensor system.

5. The monolithic integrated sensor of claim 1, wherein the output stage amplifier exhibits low-pass characteristics, has capacitive feedback, and performs the function of an averaging combiner stage.

6. The monolithic integrated sensor circuit of claim 3, wherein the sensor system comprises a Hall sensor system with a Hall plate coupled to the input amplifier of the amplifying stage.

7. The monolithic integrated sensor circuit of claim 6, further comprising a plurality of Hall plates connected in parallel.

8. The monolithic integrated sensor circuit of claim 7, wherein the current direction and voltage measurement direction in the Hall sensor system can be changed by integral multiples of approximately 90°

relative to a direction predetermined by the Hall sensor system.

9. The monolithic integrated sensor circuit of claim 6, wherein the amplifying stage further comprises a regulating circuit which stabilizes an operating point of a symmetrical signal path at a predetermined voltage level.

10. The monolithic integrated sensor circuit of claim 6, wherein the amplifying stage is a feedback operational amplifier arrangement having two feedback resistors coupled to the inputs of the input amplifier, and wherein an input resistance of the amplifying stage is formed by an internal resistance of the Hall plate connected thereto, and wherein the feedback resistors are formed from the same semiconductor material as the Hall plate.

11. The monolithic integrated sensor circuit of claim 10, wherein the output stage amplifier functions as an averaging combiner stage and comprises a transconductance amplifier.

12. The monolithic integrated sensor circuit of claim 11, wherein the clock signal source generates a first switching clock, a second switching clock whose time intervals are of the same length as the time intervals of the first switching clock, and a third switching clock having a signal that corresponds to non-overlapping portions of the first and second switching clocks, and wherein the resulting time constant is equal to or greater than the non-overlapping portion of the signal generated by the third switching clock.

13. The monolithic integrated sensor circuit of claim 3, wherein a sensor path is substantially symmetrical.

14. A monolithic integrated sensor circuit comprising:

a sensor system for generating a sensor signal;

a supply unit for generating current for the sensor system, the supply unit being coupled to a remainder of the monolithic integrated sensor circuit and defining a reference current polarity for biasing the sensor system;

an amplifying stage for amplifying the sensor signal generated by the sensor system, the amplifying stage being defined by an input amplifier and an output amplifier, wherein the input amplifier is coupled to the sensor system for receiving the sensor signal, and the output amplifier receives an amplified sensor signal from the input amplifier and functions as an averaging combiner stage;

at least three inverting means for periodically reversing the polarity of the sensor signal at equal time intervals coupled to a signal path of the amplifying stage, with one inverting means being coupled between the input and output amplifiers; and

a clock signal source coupled to the at least three inverting means which generates a first switching clock and a second switching clock, wherein the first and second switching clocks have equal time intervals and control a signal through the at least three inverting means, wherein the first switching clock causes the signal to be switched through the at least three inverting means directly and the second switching clock causes cross-switching of the signal path so that the offset error of the amplifying amplifier stage is averaged out.

15. The monolithic integrated sensor circuit of claim 14, further comprising a third switching clock generated by the clock signal source, wherein the third switching clock has a signal that corresponds to non-overlapping portions of the first and second switching clocks, and wherein the output amplifier is a transconductance amplifier having capacitive feedback, with a resulting time constant being at least as great as the non-overlapping portion of the signal generated by the third switching clock.

16. The monolithic integrated sensor circuit of claim 15, further comprising a short-circuiting switch inserted between the input amplifier and output amplifier for preventing spurious external signals from being caught by open interfaces during the time interval generated by the third switching clock.

17. The monolithic integrated sensor circuit of claim 14, wherein the sensor system comprises a Hall sensor system having a plurality of parallel-connected Hall plates.

18. A monolithic integrated sensor circuit comprising:

a sensor system for generating a sensor signal;

a supply unit for generating current for the sensor system, the supply unit being coupled to a remainder of the monolithic integrated sensor circuit and defining a reference current polarity for biasing the sensor system;

an amplifying stage for amplifying the sensor signal generated by the sensor system, the amplifying stage being defined by an input amplifier and an output amplifier, wherein the input amplifier is coupled to the sensor system for receiving the sensor signal, and the output amplifier receives an amplified sensor signal from the input amplifier and functions as an averaging combiner stage;

at least three inverting means for periodically reversing the polarity of the sensor signal at equal time intervals coupled to a signal path of the amplifying stage, with one inverting means being coupled between the input and output amplifiers;

a clock signal source coupled to the at least three inverting means which generates a first switching clock and a second switching clock, wherein the first and second switching clocks have equal time intervals and control a signal through the at least three inverting means, wherein the first switching clock causes the signal to be switched through the at least three inverting means directly and the second switching clock causes cross-switching of the signal path so that the offset error of the amplifying stage is averaged out; and

two feedback resistors coupled to the output amplifier for feeding the output signal generated from the output amplifier back to the sensor system, wherein the two feedback resistors are also coupled to the input amplifier via two of said at least three inverting means.

19. The monolithic integrated sensor circuit of claim 18, further comprising a first and second regulating circuit, wherein the first regulating circuit regulates an operating point of the input amplifier applying the reference current generated by the supply unit, and the second regulating circuit regulates an operating point of the output amplifier also by applying the reference current generated by the supply unit.

20. The monolithic integrated sensor circuit of claim 18, wherein said at least three inverting means comprising a first inverting means is located directly between the sensor system and the input amplifier;

a second inverting means is located between the input amplifier and the output amplifier;

a third inverting means is located along the signal path following the two feedback resistors; and

a fourth inverting means is connected to the supply unit.