Digital-analog shared circuit in dual mode radio equipment

• US 5,844,868 A
• Filed: 03/26/1997
• Issued: 12/01/1998
• Est. Priority Date: 04/17/1996
• Status: Expired due to Term

• Current Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Original Assignee: OKI Electric Industry Company Limited
• Inventors: Katsuyama, Tsutomu, Takahashi, Chusei
• Primary Examiner(s): DINH, TAN X
• Application Number:
  US08/824,794
• Time in Patent Office: 615 Days
• Field of Search: 369/6, 369/7, 369/8, 369/1, 369/2, 369/3, 369/4, 360/32, 375/216, 375/242, 455/403, 455/575, 455/345, 455/344
• US Class Current: 369/6
• CPC Class Codes: H04B 1/403 using the same oscillator for generating both the transmitter frequency and the receiver local oscillator frequency

Abstract

A digital-analog shared circuit in dual mode radio equipment, which shares a local oscillator in a digital mode and analog mode. A first frequency synthesizer generates a first and a second local oscillation frequency in a digital and an analog receiving mode, respectively, in response to a control signal from a switching control. In the digital receiving mode, a quadrature demodulater including a first and a second demodulator in a demodulator section is enabled, and carries out quadrature detection of a received signal fed from an RF stage, thereby supplying the detected signal to a baseband signal processor stage. In the analog receiving mode, a buffer to which the second local oscillation frequency is supplied is enabled to deliver the second local oscillation frequency to the analog IF stage. A second frequency synthesizer generates a third local oscillation frequency in a digital transmitting mode and a fourth local oscillation frequency in an analog transmitting mode. In the digital transmitting mode, a quadrature modulator including a first and a second modulator is enabled to carry out quadrature modulation using the third local oscillation frequency. In the analog transmitting mode, the fourth local oscillation frequency undergoes frequency modulation by an analog modulating signal, and the modulated signal is in turn supplied to the RF stage through the second modulator.

Claims

1. A digital-analog shared circuit in dual mode radio equipment having a digital mode and an analog mode, said digital-analog shared circuit comprising:

an analog receiver for obtaining an analog baseband signal by downconverting a received signal by a local oscillation frequency;

a digital receiver for obtaining a digital baseband signal consisting of an in-phase signal and a quadrature signal by quadrature detecting said received signal;

a digital transmitter for generating a digital transmitted signal by quadrature modulating a digital baseband signal;

an analog transmitter for generating an analog transmitted signal by frequency modulating a local oscillation frequency signal by an analog baseband signal; and

a control circuit for switching between the digital mode and the analog mode by controlling said analog receiver and said digital receiver, and by controlling said digital transmitter and said analog transmitter,

wherein said digital receiver includes a first frequency synthesizer for generating a first local oscillation frequency for the quadrature detection in response to a first control signal from said control circuit, said first frequency synthesizer generating, in response to a second control signal from said control circuit, a second local oscillation frequency which is supplied to said analog receiver as a local oscillation signal for the downconversion,

said digital transmitter including a second frequency synthesizer for generating a third local oscillation frequency for the quadrature modulation in response to a third control signal from said control circuit, said second frequency synthesizer generating, in response to a fourth control signal from said control circuit, a fourth local oscillation frequency for analog modulation, said second frequency synthesizer including a modulator for frequency modulating the analog baseband signal.

2. The digital-analog shared circuit in accordance with claim 1, wherein said digital receiver comprises a buffer circuit for developing the received signal in the form of the in-phase signal and the quadrature signal, a first demodulator for demodulating the in-phase signal fed from said buffer circuit by the first local oscillation frequency fed from said first frequency synthesizer, a phase shifter for shifting a phase of said first local oscillation frequency fed from said first frequency synthesizer by 90 degrees, and a second demodulator for demodulating the phase shifted local oscillation frequency fed from said phase shifter by the quadrature signal fed from said buffer circuit,

said control circuit driving, in a digital receiving mode, said digital receiver by enabling said buffer circuit, said first demodulator, said second demodulator, and said first frequency synthesizer, and providing, in an analog receiving mode, said analog receiver with the second local oscillation frequency from said first frequency synthesizer by disabling said buffer circuit, said first demodulator and said second demodulator, and enabling said first frequency synthesizer.

3. The digital-analog shared circuit in accordance with claim 2, wherein said phase shifter is connected to an output circuit for outputting the second local oscillation frequency to said analog receiver, and said control circuit enabling, in the analog receiving mode, said output circuit to provide said analog receiver with said second local oscillation frequency from said first frequency synthesizer through said phase shifter.

4. The digital-analog shared circuit in accordance with claim 1, wherein said digital transmitter comprises:

a first modulator for modulating the in-phase signal of the digital baseband signal by the third local oscillation frequency fed from said second frequency synthesizer;

a phase shifter for shifting a phase of said third local oscillation frequency fed from said second frequency synthesizer by 90 degrees;

a second modulator for modulating the phase shifted local oscillation frequency fed from said phase shifter by the quadrature signal of the digital baseband signal; and

a multiplier for multiplying signals fed from said first modulator and said second modulator,

said control circuit driving, in a digital transmitting mode, said digital transmitter by enabling said first modulator, said second modulator, said multiplier and said second frequency synthesizer.

5. The digital-analog shared circuit in accordance with claim 1, wherein said second frequency synthesizer comprises a voltage controlled oscillator including a variable capacitance diode,

said control circuit enabling, in said analog transmitting mode, said second frequency synthesizer, said multiplier of said digital transmitter, and one of said first modulator and second modulator to output, from said multiplier through said one of said first modulator and second modulator, the transmitted signal being modulated with the analog baseband signal fed to said variable capacitance diode of said voltage controlled oscillator, and being produced from said second frequency synthesizer.

6. The digital-analog shared circuit in accordance with claim 1, wherein said first frequency synthesizer includes a first frequency divider and said second frequency synthesizer includes a second frequency divider, said first frequency divider and said second frequency divider each varying a dividing ratio of their oscillation frequencies,

said control circuit enabling said first frequency divider and said second frequency divider to produce said first local oscillation frequency and said third local oscillation frequency in said digital mode, and enabling said first frequency divider and said second frequency divider to produce said second local oscillation frequency and said fourth local oscillation frequency in said analog mode.

7. The digital-analog shared circuit in accordance with claim 1, wherein said control circuit comprises a combination of a plurality of logic circuits, and

wherein said control circuit, receiving a mode switching signal commanding switching between said digital mode and said analog mode, an idle signal commanding reception only, and a sleep signal commanding suspension of digital operation, supplies said mode switching, idle, and sleep signals to said digital receiver and said digital transmitter through said logic circuits to control switching among respective modes.