Method and system for simulated multi-tasking

• US 5,850,536 A
• Filed: 05/01/1996
• Issued: 12/15/1998
• Est. Priority Date: 05/01/1996
• Status: Expired due to Term

• Current Assignee: Verizon Patent and Licensing Incorporated (Verizon Communications Inc.)
• Original Assignee: MCI Communications Corporation (Verizon Communications Inc.)
• Inventors: McLain, John V. Jr.
• Primary Examiner(s): Teska, Kevin J.
• Assistant Examiner(s): FREJD, RUSSELL WARREN
• Application Number:
  US08/641,460
• Time in Patent Office: 958 Days
• Field of Search: 395/500, 395/672, 395/673, 395/674, 395/677, 395/737, 364/578
• US Class Current: 703/21
• CPC Class Codes: H04M 3/2254 in networks
• CPC Class Codes: H04M 3/323 for the arrangements providing the connection (test connection, test call, call simulation)

Abstract

A computer-implemented method and apparatus for servicing multiple external interfaces in a pseudo-parallel fashion which simulates multi-tasking. An application program is programmed to switch control during the servicing of multiple external units and/or time-consuming CPU steps to optimize overall application execution time. An application services each of these external interface units through calls to respective program modules. Relatively long program modules contain calls to transfer system control to shorter program modules which await servicing. These calls are strategically inserted in a long program module after one or more partial logic of units of work have been completed. At the time of each call, a check is first made to determine whether servicing of another external interface unit with a short program module is required. If servicing is required, then control is transferred to execute the short program module. Switches between servicing the multiple external interfaces, such as a user-interface and a communication link, are substantially transparent to external users. Sub-second responses are provided simulating multi-tasking of the communication interface and the user-interface during execution of an application by a personal computer.

Claims

1. A method for servicing communication between a processor and multiple external interfaces, the multiple external interfaces including a first external interface having at least one first external interface unit and a second external interface having at least one second external interface unit, the method comprising the steps of:

checking the first external interface to determine whether said at least one first external interface unit needs servicing;

servicing said at least one first external interface unit when said first external interface checking step determines that servicing is needed;

suspending said servicing of said at least one first external interface unit when at least one partial logical unit of work has been performed in servicing said at least one first external interface unit;

checking the second external interface to determine whether said at least one second external interface unit needs servicing;

servicing said at least one second external interface unit to perform at least one partial logic unit of work when said second external interface checking step determines that servicing is needed; and

resuming said servicing of said at least one first external interface unit when at least one partial logical unit of work has been performed in servicing said second external interface unit, whereby the first and second external interfaces are serviced in a pseudo-parallel manner simulating multi-tasking.

2. The method of claim 1, further comprising the steps of:

after said first external interface checking step determines said at least one first external interface unit does not need servicing, further checking the second external interface to determine whether said at least one second external interface unit needs servicing and servicing said at least one second external interface unit to perform at least one partial logic unit of work when said further second external interface checking step determines that servicing is needed.

3. The method of claim 1, wherein said first external interface checking step comprises checking whether data has been placed in at least one buffer corresponding to each at least one first external interface unit.

4. The method of claim 1, wherein said second external interface checking step comprises checking whether data has been placed in at least one buffer corresponding to each at least one second external interface unit.

5. The method of claim 1, wherein the first external interface comprises a user-interface and said at least one first external interface unit comprises at least one mouse, keyboard, printer, and video display, and

wherein the second external interface comprises a communication interface and said at least one second external interface unit comprises at least one of an in-bound and out-bound communication link.

6. The method of claim 1, wherein said at least one first external interface unit servicing step comprises executing a program module corresponding to the respective first external interface unit needing servicing in the processor.

7. The method of claim 6, further comprising the step of pre-programming said program module by inserting control switch calls after at least one partial logic units of work, said first external interface unit servicing step comprises executing said pre-programmed program module until a control switch call is read and said suspending step begins.

8. The method of claim 1, wherein the processor provides sub-second responses to first and second external interface units during said respective first and second external interface unit servicing steps.

9. A computer-implemented method for transparently switching between servicing first and second external interface units to simulate multi-tasking, the method comprising the steps of:

servicing the first external interface unit to perform a first partial logic unit of work in a first task;

suspending said servicing of the first external interface unit after said first partial logic unit of work in said first task has been performed;

servicing the second interface unit to perform at least one partial logic unit of work in a second task; and

resuming servicing of the first external interface unit to perform a second partial logic unit of work in said second task, whereby said second task are performed in a pseudo-parallel sequence simulating multi-tasking.

10. The method of claim 9, wherein the first external interface unit comprises a peripheral unit in a user-interface and the second external interface unit comprises a communication link in a communication interface.

11. The method of claim 9, further comprising a second interface unit checking step prior to servicing the second external interface unit,

said second interface unit checking step comprising checking to determine whether said second external interface unit needs servicing, said second external interface unit servicing step services said second external interface unit only when service is needed based on said second interface checking step, otherwise said servicing of said first external interface unit is resumed.

12. A processor for performing multiple tasks in a pseudo-parallel manner to simulate multi-tasking comprising:

a first external unit servicing means for servicing a first external interface unit to perform a first task;

a second external unit servicing means for servicing a second external interface unit to perform a second task; and

a simulated multi-task controller for transparently switching processor control between said first and second external unit servicing means;

wherein said simulated multi-tasking controller switches control from said first external interface unit servicing means to said second interface unit servicing means when a first partial logic unit of work in said first task has been performed and said second external interface unit needs servicing, and

wherein said simulated multi-tasking controller switches control from said second external interface unit servicing means to said first interface unit servicing means to resume servicing a second partial logic unit of work in said first task.

13. The processor of claim 12, wherein said simulated multi-tasking controller switches control between said first and second external interface unit servicing means to provide sub-second responses to said first and second external interface units.

14. A simulated multi-tasking apparatus for servicing communication between a processor and multiple external interfaces during continuous operation of an application program, the apparatus comprising:

a user-interface comprising a plurality of peripheral units;

a communication interface comprising at least one communication link;

a user-link servicer comprising a plurality of first program modules for servicing respective peripheral units, at least one of said first program modules having a control switch call inserted after each partial logic unit of work;

a communication link-servicer comprising second program modules for servicing at least one of in-bound and out-bound communication over said communication link between the processor and said communication interface;

a simulated multi-task controller for transparently switching processor control between said user-link servicer and said communication link servicer, wherein said simulated multi-tasking controller switches control from said user-linker servicer to said communication link servicer when said user-interface servicer reads a control switch call after a first partial logic unit of work in a first task of a corresponding first program module being executed and switches control from said communication link-servicer back to said user-interface servicer to resume said first task after at least one partial logical unit of work in a second task of a corresponding second program module has been executed by said communication link servicer.

15. A computer-implemented method for switching control of a processor between multiple computer tasks to simulate multi-tasking, the method comprising the steps of:

switching control of a processor to execute a first module for performing a first task;

executing said first module in said processor;

suspending said executing of said first computer module after a first partial logic unit of work in said first task has been performed;

switching control of the processor from executing said first module to execute a second for performing a second task;

executing said second module in said processor; and

switching control of the processor from executing said second module to resume executing said first module when at least one partial logic unit of work has been performed toward said second task, whereby the first and second tasks are performed in a pseudo-parallel sequence to simulate multi-tasking.

16. The method of claim 15, wherein the first task is more time-consuming than the second task as said processor requires more time to execute said first module than said second module.

17. A simulated multi-tasking processor comprising:

a processor for executing first and second computer program modules implementing respective first and second tasks; and

a simulated multi-tasking controller for switching control of said processor between executing said first and second computer program modules,

wherein said simulated multi-task controller suspends execution of said first computer program module after a first partial logic unit of work in said first task has been performed, switches control of said processor from executing said first computer program module to execute said second computer program module, switches control of said the processor from executing said second computer program module to resume executing said first computer program module when at least one partial logic unit of work has been performed toward said second task, whereby the first and second tasks are performed in a pseudo-parallel sequence to simulate multi-tasking.

18. The apparatus of claim 17, wherein the first task is more time-consuming than the second task as said processor requires more time to execute said first computer program module than said second computer program module.