Voltage regulator with load pole stabilization

• US 5,852,359 A
• Filed: 07/08/1997
• Issued: 12/22/1998
• Est. Priority Date: 09/29/1995
• Status: Expired due to Term

• Current Assignee: STMicroelectronics Incorporated (STMicroelectronics NV)
• Original Assignee: STMicroelectronics Incorporated (STMicroelectronics NV)
• Inventors: Edwards, William E., Callahan, Michael J. Jr.
• Primary Examiner(s): Nappi, Robert E.
• Assistant Examiner(s): Vu, Bao Q.
• Application Number:
  US08/889,816
• Time in Patent Office: 532 Days
• Field of Search: 323/273, 323/274, 323/275, 323/280, 330/109
• US Class Current: 323/274
• CPC Class Codes: G05F 1/565 sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor G05F1/563 takes precedence
• CPC Class Codes: G05F 1/575 characterised by the feedback circuit

Abstract

A voltage regulator with load pole stabilization is disclosed. The voltage regulator consists of an error amplifier, an integrator which includes a switched capacitor, a pass transistor, and a feedback circuit. In one embodiment, the integrator circuit includes an amplifier, a capacitor, and a switched capacitor which is driven by a voltage controlled oscillator. The voltage controlled oscillator changes its frequency of oscillation proportional to the output current. In another embodiment, the switched capacitor is driven by a current controlled oscillator whose frequency of oscillation is also proportional to the output current of the voltage regulator. When the output current demand is large, the controlled oscillators increase the frequency which decreases the effective resistance of the switched capacitor thereby changing the frequency of the zero to respond to the change in the load pole. Conversely, the effective resistance is increased as the current demand is decreased, also to respond to the decrease in load pole. The controlled oscillator may be coupled to a current sensing device that generates a scaled version of the load current and couples to the regulated voltage output. The controlled oscillator is restricted to operating voltages that are related to the regulated output voltage and a control current that is a scaled version of the load current. Consequently, the disclosed voltage regulator has high stability without consuming excess power.

Claims

1. A voltage regulator circuit to generate a regulated output voltage at a voltage regulator output using an error amp, an amplifier, a pass transistor, wherein the amplifier further comprises:

a compensation capacitor coupled to the amplifier;

a variable oscillator having an input coupled to the voltage regulator output to sense changes in current draw at the voltage regulator output, said variable oscillator being controlled by the regulated output voltage to generate a clock signal whose frequency is proportional to a current demand on the voltage regulator; and

a switched capacitor having a clock input configured to receive said clock signal and operable to vary the zero of the voltage regulator as a function of the current draw on the voltage regulator output.

2. The voltage regulator circuit of claim 1, further comprising a control capacitor within said variable oscillator, said control capacitor being alternately charged to a first voltage level discharged to a second voltage level proportional to the regulated output voltage and less than said first voltage level with at least one of the charging and discharging of said control capacitor being accomplished using a control current proportional to the current draw on the voltage regulator output to generate a time-varying signal whose frequency is proportional to the current demand on the voltage regulator and the regulated output voltage.

3. The voltage regulator circuit of claim 2 wherein said first voltage level equals the regulated output voltage.

4. The voltage regulator circuit of claim 2 wherein said second voltage level equals a circuit ground reference voltage.

5. The voltage regulator circuit of claim 1, further comprising a control capacitor within said variable oscillator, said control capacitor being alternately charged to a first voltage level proportional to the regulated output voltage and discharged to a second voltage level proportional to the regulated output voltage and less than said first voltage level with at least one of the charging and discharging of said control capacitor being accomplished using a control current proportional to the current draw on the voltage regulator output to generate a time-varying signal whose frequency is proportional to the current demand on the voltage regulator and the regulated output voltage.

6. The voltage regulator circuit of claim 5 wherein said first voltage level equals the regulated output voltage.

7. The voltage regulator circuit of claim 5, further including a window comparator circuit coupled to said control capacitor and receiving said first and second control voltages, said window comparator circuit generating a capacitor control signal having a first control signal level to charge said control capacitor to said first voltage level and a second control signal level to discharge said control capacitor to said second voltage level.

8. The voltage regulator circuit of claim 7, further including a charging transistor coupled to said control capacitor and responsive to said capacitor control signal at said first control signal level to charge said control capacitor and a discharging transistor coupled to said control capacitor and responsive to said capacitor control signal at said second control signal level to discharge said control capacitor.

9. The voltage regulator circuit of claim 7 wherein said window comparator circuit includes hysteresis.

10. The voltage regulator circuit of claim 1, further including a current sensing transistor coupled to the pass transistor and said variable oscillator to generate a signal indicative of the current draw on the voltage regulator output.

11. The voltage regulator circuit of claim 10 wherein said current sensing transistor has a first terminal coupled to a corresponding terminal in the pass transistor and a control terminal coupled to a corresponding control terminal in the pass transistor, said current sensing transistor having a third terminal coupled to said variable oscillator.

12. The voltage regulator circuit of claim 1 wherein said variable oscillator is a voltage-controlled oscillator.

13. The voltage regulator circuit of claim 1 wherein said variable oscillator is a current-controlled oscillator.

14. The voltage regulator circuit of claim 1 wherein the switched capacitor comprises:

a first transistor having a drain, source, and a gate for receiving said clock signal;

a capacitor having a first end coupled to the drain of the first transistor and having a second end coupled to ground; and

a second transistor having a drain coupled to the first end of the capacitor, having a source, and having a gate for receiving an inverted version of said clock signal.

15. An automatic stabilization circuit for a voltage regulator having a regulating element coupled to a regulator output terminal and connectable to a load to generate a regulated output voltage, a feedback element, and an amplifier having input and output terminals, the automatic stabilization circuit comprising:

a variable oscillator coupled to the regulator output terminal to receive the regulated output voltage and having a control input coupled to the regulator output terminal to sense current draw from the voltage regulator and an oscillator output, said variable oscillator using said regulated output voltage and said sensed current draw to generate a variable frequency clock signal whose frequency is dependent on the current draw from the voltage regulator; and

a switched capacitor circuit coupled to the amplifier to provide variable compensation to the amplifier, the switched capacitor circuit receiving said variable frequency clock signal and generating a variable impedance whose value varies in response to changes in the frequency of said variable frequency clock signal.

16. The circuit of claim 15 wherein the switched capacitor is coupled in series between the input and output terminals of the amplifier.

17. The circuit of claim 15 wherein the regulating element is a pass transistor coupled between a voltage source and the output of the voltage regulator and having a control input coupled to the output of the amplifier.

18. The circuit of claim 15, further comprising a control capacitor within said variable oscillator, said control capacitor being alternately charged and discharged to generate a time-varying voltage signal whose frequency is proportional to the current draw from the voltage regulator with at least one of the charging or discharging of said control capacitor being accomplished by a control current proportional to the current draw from the voltage regulator output.

19. The circuit of claim 18 wherein said control capacitor is charged to a first voltage level proportional to the regulated output voltage and discharged to a second voltage level proportional to the regulated output voltage and less than said first voltage level to generate said time-varying voltage signal.

20. The circuit of claim 19 wherein said first voltage level equals the regulated output voltage.

21. The circuit of claim 18 wherein said control capacitor is charged to a first voltage level and discharged to a second voltage level less than said first voltage level to generate said time-varying voltage signal.

22. The circuit of claim 21 wherein said first voltage level equals the regulated output voltage.

23. The circuit of claim 21 wherein said second voltage level equals a circuit ground reference voltage.

24. The circuit of claim 18, further including an amplifier coupled to said control capacitor to amplify said time-varying voltage signal and thereby generate said variable frequency clock signal.

25. The circuit of claim 15, further including a current sensing transistor coupled to the regulating element and said variable oscillator to generate a signal indicative of the current draw from the voltage regulator.

26. A method for stabilizing a voltage regulator circuit generating a regulated output voltage, the method comprising the steps of:

sensing current draw from the voltage regulator circuit;

generating a variable frequency clock signal whose frequency is dependent on the current draw from the voltage regulator circuit and whose amplitude is dependent on the regulated output voltage; and

generating a variable impedance whose value varies in response to changes in the frequency of said variable frequency clock signal to compensate the voltage regulator for changes in the current draw from the voltage regulator.

27. The method of claim 26 wherein said step of generating a variable impedance uses a switched capacitor circuit coupled to the amplifier to provide compensation to the voltage regulator.

28. The method of claim 26 wherein the step of generating a variable frequency clock signal includes the steps of alternately charging and discharging a control capacitor to first and second voltage values, respectively, that are dependent on the regulated output voltage to generate a time-varying voltage signal whose frequency is proportional to the current draw from the voltage regulator, with at least one of the charging and discharging of said control capacitor using a control current proportional to the current draw from the voltage regulator.

29. The method of claim 28 wherein said control capacitor is charged to a first voltage level proportional to the regulated output voltage by said control current and discharged by said control current to a second voltage level proportional to the regulated output voltage and less than said first voltage level to generate said time-varying voltage signal.

30. The method of claim 29 wherein said first voltage level is equal to the regulated output voltage.

31. The method of claim 28 wherein said control capacitor is charged to a first voltage level by said control current and discharged by said control current to a second voltage level less than said first voltage level to generate said time-varying voltage signal.

32. The method of claim 31 wherein said first voltage level is equal to the regulated output voltage.

33. The method of claim 31 wherein said second voltage level equals a circuit ground reference voltage.