Power-saving circuit and method for driving liquid crystal display

• US 5,852,426 A
• Filed: 03/21/1996
• Issued: 12/22/1998
• Est. Priority Date: 08/16/1994
• Status: Expired due to Term

• Current Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Original Assignee: Vivid Semiconductor, Inc. (Texas Instruments, Inc.)
• Inventors: Erhart, Richard Alexander, Harder, Gerald T.
• Primary Examiner(s): Hjerpe, Richard A.
• Assistant Examiner(s): CHANG, KENT WU
• Application Number:
  US08/620,132
• Time in Patent Office: 1,006 Days
• Field of Search: 345/87, 345/94, 345/96, 345/99, 345/100, 345/208, 345/209, 345/211, 345/212
• US Class Current: 345/96
• CPC Class Codes: G09G 2310/0248 Precharge or discharge of column electrodes before or after applying exact column voltages
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 2330/023 using energy recovery or conservation
• CPC Class Codes: G09G 3/2011 by amplitude modulation
• CPC Class Codes: G09G 3/3614 Control of polarity reversal in general
• CPC Class Codes: G09G 3/3655 Details of drivers for counter electrodes, e.g. common electrodes for pixel capacitors or supplementary storage capacitors
• CPC Class Codes: G09G 3/3688 suitable for active matrices only

Abstract

A power-saving column driver integrated circuit, and a power-saving method for driving a liquid crystal display, include a series of multiplexers coupled to the columns of the display. The multiplexers selectively couple each of the columns to a common external storage capacitor during a portion of each row drive period for discharging each of the pixels in the selected row of the liquid crystal display to a median bias voltage. During the remaining portion of each row drive period, the multiplexers selectively couple voltage drivers to the columns of the LCD pixel array for applying a desired driving voltage to each column of the array. The polarity of the driving voltages applied to each column alternates on succeeding row drive periods, and the resulting voltage that is summed on the storage capacitor averages to the median bias voltage. For active matrix liquid crystal display panels, a multiplexer selectively couples the backplane of the display panel to either an external storage capacitor or to an alternating-polarity backplane driving voltage during each row drive period.

Claims

1. A power-saving column driver circuit for applying driving voltages to a plurality of columns in a liquid crystal display, the liquid crystal display including an array of pixels arranged in rows and columns, and the liquid crystal display including row driver circuitry for selecting at least one row in the pixel array during a row drive period, the row driver circuitry selecting all rows in the pixel array at least once during a display cycle, said column driver circuit comprising in combination:

a. a plurality of analog voltage drivers, each of said plurality of analog voltage drivers providing an analog driving voltage to be applied to a given column of the liquid crystal display during a given row drive period for controlling the pixel located at the given column within the selected row and for establishing a desired gray shade at such pixel corresponding to said analog driving voltage;

b. clocking means for providing a control signal switching between a first state and a second state during at least one row drive period of each display cycle;

c. a plurality of multiplexers, each of such multiplexers having a control terminal coupled to said clocking means for receiving the control signal, each of such multiplexers having a column terminal coupled to one of the columns of the liquid crystal display, each of such multiplexers having an input terminal coupled to one of said plurality of analog voltage drivers for receiving the analog voltage to be applied to a given column of the liquid crystal display during a given row drive period, and each of such multiplexers having a common terminal, each of such multiplexers electrically coupling the column terminal thereof to the common terminal thereof when the control signal is in the first state, and each of such multiplexers electrically coupling the column terminal thereof to the input terminal thereof when the control signal is in the second state;

d. a common node coupled to the common terminal of each of said plurality of multiplexers;

e. said plurality of multiplexers electrically coupling each of the columns of the liquid crystal display to said common node when the control signal is in its first state, and said plurality of multiplexers coupling each analog driving voltage produced by said plurality of analog voltage drivers to a respective one of the columns when the control signal is in its second state.

2. The column driver circuit recited by claim 1 wherein said clocking means functions to switch the control signal between a first state and a second state during every row drive period of each display cycle, whereby said plurality of multiplexers electrically couple each of the columns of the liquid crystal display to said common node when the control signal is in its first state during every row drive period, and said plurality of multiplexers couple each driving voltage produced by said plurality of voltage drivers to a respective one of the columns when the control signal is in its second state during every row drive period.

3. The column driver circuit recited by claim 2 wherein said plurality of voltage drivers provide a driving voltage that is of one polarity during one row driving period for a selected row, and provide a driving voltage of an opposite polarity during a next row drive period for the same selected row.

4. The column driver circuit recited by claim 3 wherein said plurality of voltage drivers provide a driving voltage that is of one polarity during one row driving period for a selected row, and provide a driving voltage of an opposite polarity during a next row drive period for the next succeeding row.

5. The column driver circuit recited by claim 4 wherein said plurality of voltage drivers provide driving voltages to the columns in a manner by which, during any given row drive period, two adjacent columns of the liquid crystal display are driven with two driving voltages that are of opposite polarities when said control signal is in its second state.

6. The column driver circuit recited by claim 2 including a storage capacitor having a first terminal coupled to said common node and coupled to the common terminal of each of said plurality of multiplexers.

7. The column driver circuit recited by claim 6 wherein the liquid crystal display includes a number of columns equal to N, wherein each column of the liquid crystal display has a capacitance C_col associated therewith, and wherein the value of the capacitance of said storage capacitor is greater than N times C_col.

8. The column driver circuit recited by claim 6 wherein said plurality of voltage drivers provide a driving voltage that alternates in polarity between a most-positive voltage and a least-positive voltage, and wherein the midpoint between said most-positive voltage and said least-positive voltage corresponds to a median bias voltage, and wherein said storage capacitor includes a second terminal coupled to a source of said median bias voltage.

9. The column driver circuit recited by claim 8 wherein, during a given row drive period, two adjacent columns of the liquid crystal display are driven with two driving voltages that are above and below, respectively, said median bias voltage when said control signal is in its second state.

10. The column driver circuit recited by claim 6 wherein said storage capacitor includes a second terminal coupled to a terminal of a battery.

11. The column driver circuit recited by claim 2 wherein said plurality of voltage drivers provide a driving voltage that alternates in polarity between a most-positive voltage and a least-positive voltage, and wherein the midpoint between said most-positive voltage and said least-positive voltage corresponds to a median bias voltage, and wherein said common node is coupled to a terminal of a battery sourcing the median bias voltage.

12. The column driver circuit recited by claim 2 wherein each of said multiplexers comprises first and second CMOS transmission gates, the first CMOS transmission gate being coupled between said column terminal and said common terminal for selectively coupling a column of the liquid crystal display to said common node, and said second CMOS transmission gate being coupled between said column terminal and one of said voltage drivers for selectively coupling the driving voltage produced by such voltage driver to its associated column.

13. The column driver circuit recited by claim 2 wherein each of said multiplexers comprises first and second n-channel MOS transistors, the drain terminals of said transistors being coupled in common to a column, the gate terminals of the first and second transistors being coupled to the control signal and to a complement of the control signal, respectively, the source terminal of one of the first and second transistors being coupled to said common terminal, and the source terminal of the other transistor being coupled to one of said voltage drivers.

14. The column driver circuit recited by claim 2 wherein each of said multiplexers comprises first and second p-channel MOS transistors, the drain terminals of said transistors being coupled in common to a column, the gate terminals of the first and second transistors being coupled to the control signal and to a complement of the control signal, respectively, the source terminal of one of the first and second transistors being coupled to said common terminal, and the source terminal of the other transistor being coupled to one of said voltage drivers.

15. A power-saving column driver circuit for applying driving voltages to a plurality of columns in a liquid crystal display, the liquid crystal display including an array of pixels arranged in rows and columns, and the liquid crystal display including row driver circuitry for selecting at least one row in the pixel array during a row drive period, the row driver circuitry selecting all rows in the pixel array at least once during a display cycle, said column driver circuit comprising in combination:

a. clocking means for providing a control signal switching between a first state and a second state during at least one row drive period of each display cycle;

b. a plurality of analog voltage drivers each having an output terminal coupled to a column of the liquid crystal display, each of said plurality of analog voltage drivers providing an analog driving voltage to be applied to a given column of the liquid crystal display during a given row drive period for controlling the pixel located at the given column within the selected row and for establishing a desired gray shade at such pixel corresponding to said analog driving voltage, each such voltage driver having a control input for receiving the control signal and selectively disabling the output terminal of said analog voltage driver when the control signal is in its first state, and enabling the output terminal of said analog voltage driver when the control signal is in its second state;

c. a plurality of transmission gates, each of such transmission gates having a control terminal coupled to said clocking means for receiving the control signal, each of such transmission gates having a column terminal coupled to one of the columns of the liquid crystal display, each of such transmission gates having a common terminal, each of such transmission gates electrically coupling the column terminal thereof to the common terminal thereof when the control signal is in the first state, and each of such transmission gates decoupling the column terminal thereof from the common terminal thereof when the control signal is in the second state; and

d. a common node coupled to the common terminal of each of said plurality of transmission gates;

e. said plurality of transmission gates electrically coupling each of the columns of the liquid crystal display to said common node when the control signal is in its first state, and said plurality of analog voltage drivers providing analog driving voltages to the columns when the control signal is in its second state.

16. The column driver circuit recited by claim 15 wherein said clocking means functions to switch the control signal between a first state and a second state during every row drive period of each display cycle, whereby said plurality of transmission gates electrically couple each of the columns of the liquid crystal display to said common node when the control signal is in its first state during every row drive period, and the output terminals of said plurality of voltage drivers are enabled to apply the driving voltages produced by said plurality of voltage drivers to the columns when the control signal is in its second state during every row drive period.

17. The column driver circuit recited by claim 16 including a storage capacitor having a first terminal coupled to said common node and coupled to the common terminal of each of said plurality of transmission gates.

18. The column driver circuit recited by claim 17 wherein the liquid crystal display includes a number of columns equal to N, wherein each column of the liquid crystal display has a capacitance C_col associated therewith, and wherein the value of the capacitance of said storage capacitor is greater than N times C_col.

19. The column driver circuit recited by claim 17 wherein said plurality of voltage drivers provide a driving voltage that alternates in polarity between a most-positive voltage and a least-positive voltage, and wherein the midpoint between said most-positive voltage and said least-positive voltage corresponds to a median bias voltage, and wherein said storage capacitor includes a second terminal coupled to a source of said median bias voltage.

20. The column driver circuit recited by claim 17 wherein said storage capacitor includes a second terminal coupled to a terminal of a battery.

21. The column driver circuit recited by claim 16 wherein said plurality of voltage drivers provide a driving voltage that alternates in polarity between a most-positive voltage and a least-positive voltage, and wherein the midpoint between said most-positive voltage and said least-positive voltage corresponds to a median bias voltage, and wherein said common node is coupled to a terminal of a battery sourcing the median bias voltage.

22. The column driver circuit recited by claim 16 wherein each of said plurality of transmission gates includes an n channel transistor having its gate terminal coupled to the control signal and having its source and drain terminals coupled to the column terminal and common terminal, respectively.

23. The column driver circuit recited by claim 16 wherein each of said plurality of transmission gates includes a p channel transistor having its gate terminal coupled to the control signal and having its source and drain terminals coupled to the column terminal and common terminal, respectively.

24. The column driver circuit recited by claim 16 wherein each of said plurality of transmission gates is a CMOS transmission gate including an n-channel transistor and a p-channel transistor coupled in parallel, the gate terminals of said n-channel and p-channel transistor being coupled to the control signal and the complement of the control signal, respectively.

25. A power-saving column driver circuit for applying driving voltages to a plurality of columns in a liquid crystal display, the liquid crystal display including an array of pixels arranged in rows and columns, and the liquid crystal display including row driver circuitry for selecting at least one row in the pixel array during a row drive period, the row driver circuitry selecting all rows in the pixel array at least once during a display cycle, said column driver circuit comprising in combination:

a. first and second analog voltage drivers for providing first and second analog driving voltages to be applied to first and second columns, respectively, of the liquid crystal display during a given row drive period for controlling the pixels locate at said first and second columns within the selected row and for establishing a desired gray shade at such pixels corresponding to said first and second analog driving voltages;

b. clocking means for providing a control signal switching between a first state and a second state during at least one row drive period of each display cycle;

c. first and second multiplexers each having a control terminal coupled to said clocking means for receiving the control signal, said first and second multiplexers each having a column terminal coupled to said first and second columns, respectively, of the liquid crystal display, said first and second multiplexers each having an input terminal coupled to said first and second analog voltage drivers, respectively, for receiving the first and second analog driving voltages to be applied to said first and second columns, respectively, of the liquid crystal display during a given row drive period, and each of said first and second multiplexers having a common terminal, each of said first and second multiplexers electrically coupling the column terminal thereof to the common terminal thereof when the control signal is in the first state, and each of such multiplexers electrically coupling the column terminal thereof to the input terminal thereof when the control signal is in the second state;

d. a common node coupled to the common terminal of each of said first and second multiplexers,

e. said first and second multiplexers electrically coupling the first and second columns of the liquid crystal display to said common node when the control signal is in its first state, and said first and second multiplexers coupling said first and second analog driving voltages produced by said first and second analog voltage drivers to said first and second columns, respectively, when the control signal is in its second state.

26. A power-saving column driver circuit for applying driving voltages to a plurality of columns in a liquid crystal display, the liquid crystal display including an array of pixels arranged in rows and columns, and the liquid crystal display including row driver circuitry for selecting at least one row in the pixel array during a row drive period, the row driver circuitry selecting all rows in the pixel array at least once during a display cycle, said column driver circuit comprising in combination:

a. clocking means for providing a control signal switching between a first state and a second state during at least one row drive period of each display cycle;

b. first and second analog voltage drivers each having an output terminal coupled to first and second columns, respectively, of the liquid crystal display, said first and second analog voltage drivers providing first and second analog driving voltages to be applied to said first and second columns of the liquid crystal display during a given row drive period for controlling the pixels located at said first and second columns, respectively, within the selected row and for establishing a desired gray shade at such pixels corresponding to said first and second analog driving voltages, respectively, each such analog voltage driver having a control input for receiving the control signal and selectively disabling the output terminal of said analog voltage driver when the control signal is in its first state, and enabling the output terminal of said analog voltage driver when the control signal is in its second state;

c. first and second transmission gates each having a control terminal coupled to said clocking means for receiving the control signal, said first and second transmission gates each having a column terminal coupled to said first and second columns, respectively, of the liquid crystal display, each of such transmission gates having a common terminal, each of such transmission gates electrically coupling the column terminal thereof to the common terminal thereof when the control signal is in the first state, and each of such transmission gates decoupling the column terminal thereof from the common terminal thereof when the control signal is in the second state; and

d. a common node coupled to the common terminal of said first and second transmission gates;

e. said first and second transmission gates electrically coupling said first and second columns of the liquid crystal display to said common node when the control signal is in its first state, and said first and second voltage drivers providing first and second analog driving voltages to said first and second columns, respectively, when the control signal is in its second state.

27. A method of driving columns in a liquid crystal display while conserving power, the liquid crystal display including an array of pixels arranged in rows and columns, the liquid crystal display including a backplane, said method including the steps of:

a. applying a bias voltage to the backplane of the liquid crystal display;

b. providing a first common node;

c. temporarily electrically coupling at least first and second columns of the array to the first common node a first time;

d. applying first and second driving voltages to the first and second columns, respectively, of the array, the first driving voltage being of a first polarity relative to the backplane bias voltage, and the second driving voltage being of a second opposing polarity relative to the backplane bias voltage;

e. transferring the first and second driving voltages applied to the first and second columns, respectively, onto corresponding first and second pixels, respectively, of a first row of pixels within the array of pixels;

f. decoupling the first row of pixels from the first and second columns;

g. temporarily electrically coupling the first and second columns of the array to the first common node a second time;

h. applying third and fourth driving voltages to the first and second columns, respectively, of the array, the third driving voltage being of the second polarity relative to the backplane bias voltage, and the fourth driving voltage being of the first polarity relative to the backplane bias voltage;

i. transferring the third and fourth driving voltages applied to the first and second columns, respectively, onto corresponding first and second pixels, respectively, of a second row of pixels within the array of pixels;

j. decoupling the second row of pixels from the first and second columns; and

k. repeating steps c. through j. for remaining pairs of rows within the array.

28. The method of driving columns in a liquid crystal display while conserving power as recited in claim 27 wherein the first driving voltage, second driving voltage, third driving voltage, and fourth driving voltage are each analog voltages for allowing the first and second pixels within the adjacent first and second rows of pixels to display varying shades of gray.

29. A method of driving columns in a liquid crystal display while conserving power, the liquid crystal display including an array of pixels arranged in rows and columns, the rows of pixels being arranged in pairs of rows, said method including the steps of:

a. providing a first common node;

b. temporarily electrically coupling at least first and second columns of the array to the first common node a first time;

c. applying first and second driving voltages to the first and second columns, respectively, of the array;

d. transferring the first and second driving voltages applied to the first and second columns, respectively, onto corresponding first and second pixels, respectively, of a first row of pixels within the array of pixels;

e. decoupling the first row of pixels from the first and second columns;

f. temporarily electrically coupling the first and second columns of the array to the first common node a second time;

g. applying third and fourth driving voltages to the first and second columns, respectively, of the array;

h. transferring the third and fourth driving voltages applied to the first and second columns, respectively, onto corresponding first and second pixels, respectively, of a second row of pixels within the array of pixels, the second row being paired with the first row;

i. decoupling the second row of pixels from the first and second columns; and

j. repeating steps b. through i. for remaining pairs of rows within the array;

k. the first driving voltage, second driving voltage, third driving voltage, and fourth driving voltage each being an analog voltage for allowing the first and second pixels within the first row and the first and second pixels in the second row to display varying shades of gray.