ROM device using a schuckly diode
First Claim
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1. A ROM device, comprising:
- a plate;
plural bit lines, formed in a first direction on the plate, including a heavily doped layer with a second conductivity type dopant, a lightly doped layer with a first conductivity type dopant, a lightly doped layer with the second conductivity type dopant, and a heavily doped layer with the first conductivity type dopant formed on the plate in order;
a first insulating layer formed on a surface of the plate and the bit lines;
plural first contact windows formed in the bit lines such that the heavily doped layer with the second conductivity type dopant is exposed at a bottom of the first contact windows;
plural spaced walls formed on side walls of the first contact windows;
plural diffusion regions with the second conductivity type dopant formed in the heavily doped layer with the second conductivity type dopant at the bottom of the first contact windows;
plural second contact windows formed in the first insulating layer such that the heavily doped layer with the first conductivity type dopant is partly exposed at a bottom of the second contact windows;
plural conducting regions formed on the first contact windows, wherein the conducting regions fill the first contact windows and are coupled to the heavily doped layer with the second conductivity type dopant; and
plural word lines, formed in a second direction on a surface of the first insulating layer and filling the second contact windows, wherein the word lines intersect with the bit lines to form plural memory cells and wherein memory cells including filled-in second contact windows are turned-on memory cells and memory cells excluding filled-in second contact windows are turned-off memory cells.
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Abstract
A ROM device using a Shockly diode uses the Shockly diode as a memory cell in the ROM device. In the present invention, the current of the memory cell is larger than that of a convention one. In the conventional ROM device, the code is programmed by making use of the channel transistor as the memory cell and implanting. In the present invention, the code is programmed by defining contact windows of the ROM device to prevent the ROM device from the shortcomings of limited current. In addition, the memory cells of the ROM device of a Shockly diode are isolated by an insulating layer, resulting in a smaller area for the device and improved integrity.
56 Citations
18 Claims
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1. A ROM device, comprising:
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a plate; plural bit lines, formed in a first direction on the plate, including a heavily doped layer with a second conductivity type dopant, a lightly doped layer with a first conductivity type dopant, a lightly doped layer with the second conductivity type dopant, and a heavily doped layer with the first conductivity type dopant formed on the plate in order; a first insulating layer formed on a surface of the plate and the bit lines; plural first contact windows formed in the bit lines such that the heavily doped layer with the second conductivity type dopant is exposed at a bottom of the first contact windows; plural spaced walls formed on side walls of the first contact windows; plural diffusion regions with the second conductivity type dopant formed in the heavily doped layer with the second conductivity type dopant at the bottom of the first contact windows; plural second contact windows formed in the first insulating layer such that the heavily doped layer with the first conductivity type dopant is partly exposed at a bottom of the second contact windows; plural conducting regions formed on the first contact windows, wherein the conducting regions fill the first contact windows and are coupled to the heavily doped layer with the second conductivity type dopant; and plural word lines, formed in a second direction on a surface of the first insulating layer and filling the second contact windows, wherein the word lines intersect with the bit lines to form plural memory cells and wherein memory cells including filled-in second contact windows are turned-on memory cells and memory cells excluding filled-in second contact windows are turned-off memory cells. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18)
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Specification
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Current AssigneeUnited Microelectronics Corporation
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Original AssigneeUnited Microelectronics Corporation
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InventorsWen, Jemmy
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Primary Examiner(s)CHANG, JONI YUK YING
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Application NumberUS08/906,313Time in Patent Office511 DaysField of Search438/128, 438/275-279, 438/282, 257/390-392US Class Current438/275CPC Class CodesG11C 17/06 using diode elements G11C17...H01L 27/0629 in combination with diodes,...H01L 27/1021 including diodes onlyH10B 99/00 Subject matter not provided...
