Reference buffer with multiple gain stages for large, controlled effective transconductance

• US 5,854,574 A
• Filed: 04/26/1996
• Issued: 12/29/1998
• Est. Priority Date: 04/26/1996
• Status: Expired due to Term

• Current Assignee: Analog Devices, Inc.
• Original Assignee: Analog Devices, Inc.
• Inventors: Brooks, Todd L., Singer, Lawrence
• Primary Examiner(s): Mullins, James B.
• Application Number:
  US08/639,208
• Time in Patent Office: 977 Days
• Field of Search: 330/253, 330/257, 330/288, 330/310, 330/311, 330/293, 330/294, 330/306, 330/260, 323/315
• US Class Current: 330/293
• CPC Class Codes: H03F 2203/45068 the resulting deducted common mode signal being added at the one or more outputs of the differential amplifier
• CPC Class Codes: H03F 2203/45216 A cross coupling circuit being added at the output terminals of the amplifying transistors of a differential amplifier
• CPC Class Codes: H03F 2203/45352 the AAC comprising a combination of a plurality of transistors, e.g. Darlington coupled transistors
• CPC Class Codes: H03F 2203/45508 the CSC comprising a voltage generating circuit as bias circuit for the CSC
• CPC Class Codes: H03F 2203/45644 the LC comprising a cross coupling circuit, e.g. comprising two cross-coupled transistors
• CPC Class Codes: H03F 2203/45658 the LC comprising two diodes of current mirrors
• CPC Class Codes: H03F 3/3028 with symmetrical driving of the end stage
• CPC Class Codes: H03F 3/45183 Long tailed pairs H03F3/4521, H03F3/45237 take precedence
• CPC Class Codes: H03F 3/45659 Controlling the loading circuit of the differential amplifier
• CPC Class Codes: H03F 3/45946 Controlling the loading circuit of the differential amplifier

Abstract

A reference buffer suitable for driving switched-capacitor or resistive load circuits provides a very low output impedance. The reference buffer utilizes an amplifier with a very large and controlled transconductance configured in feedback and compensated by a load capacitance. Cascaded gain stages are used to provide a large, controlled transconductance. In one embodiment, a reference buffer amplifier includes a plurality of voltage gain amplifiers connected in cascade and at least one transconductance amplifier connected to a last-connected of the plurality of voltage gain amplifiers. The amplifier may further include at least one current mirror amplifier connected to the at least one transconductance amplifier. In another embodiment, the reference buffer amplifier includes at least one transconductance amplifier and at least one current mirror amplifier cascade-connected to the at least one transconductance amplifier. The amplifiers can be differential or single-ended.

Claims

1. A reference buffer amplifier comprising:

a transconductance amplifier including a voltage input, received on an input terminal, and a current output, provided on an output terminal, the output terminal connected in feedback to the input terminal, the transconductance amplifier including;

a plurality of voltage gain stages connected in cascade;

at least one transconductance stage connected to a last-connected of the plurality of voltage gain stages; and

a load capacitor, that controls a bandwidth of the reference buffer, one terminal of which is connected to the output terminal of the transconductance amplifier and another terminal of which is connected a node external to the transconductance amplifier.

2. The reference buffer amplifier as claimed in claim 1 further including at least one current gain stage connected to the at least one transconductance stage.

3. The reference buffer amplifier as claimed in claim 1 wherein at least one voltage gain stage includes input devices and load devices having approximately the same doping.

4. The reference buffer amplifier as claimed in claim 3 wherein an output of the voltage gain stage is taken from source terminals of the load devices.

5. The reference buffer amplifier as claimed in claim 3 wherein an output terminal of the voltage gain stage is taken from a common gate and drain terminal of the load devices.

6. The reference buffer amplifier as claimed in claim 3 wherein a current density of the input devices and a current density of the load devices are approximately equal.

7. The reference buffer amplifier as claimed in claim 3 wherein positive feedback is added to the load devices to increase a voltage gain of the voltage gain stage.

8. The reference buffer amplifier as claimed in claim 1 wherein at least one voltage gain stage includes load resistors, a differential input pair and a bias current, the differential input pair and bias current are set such that a transconductance of the differential input pair is proportional to the load resistors.

9. A reference buffer amplifier comprising:

a transconductance amplifier including a voltage input received on an input terminal and a current output provided on an output terminal, the output terminal connected in feedback to the input terminal, the transconductance amplifier including;

a voltage gain stage coupled to the input;

at least one transconductance stage connected to an output of the voltage gain stage;

a plurality of current gain stages cascade-connected to an output of a last connected of the at least one transconductance stage; and

a load capacitor, that controls a bandwidth of the reference buffer, one terminal of which is connected to the output terminal of the transconductance amplifier and another terminal of which is connected a node external to the transconductance amplifier.

10. The reference buffer amplifier as claimed in claim 9 wherein at least one of the current gain stages includes a current mirror.

11. The reference buffer amplifier as claimed in claim 9 wherein at least one current gain stage includes means for reducing a quiescent current at an output of the current gain stage.

12. The reference buffer amplifier as claimed in claim 9 further including means for providing a single pole having a frequency below that of parasitic poles of the reference buffer for aiding in reference buffer stability.

13. A reference buffer comprising:

at least one transconductance amplifier; and

at least one current gain amplifier cascade-connected to the at least one transconductance amplifier;

wherein the at least one current gain amplifier includes a current mirror having positive feedback to increase a current gain of the current gain amplifier without increasing a quiescent power of the current gain amplifier.

14. A reference buffer amplifier comprising:

a differential transconductance amplifier including a voltage input received on an input terminal and a current output provided on first and second output terminals, at least one of the first and second output terminals connected in feedback to the input terminal, the transconductance amplifier including;

a plurality of voltage gain stages connected in cascade;

at least one transconductance stage connected to a last-connected of the plurality of voltage gain stages; and

a load capacitor, connected between the first and second output terminals of the transconductance amplifier, that controls a bandwidth of the reference buffer.

15. A reference buffer amplifier comprising:

a transconductance amplifier including a voltage input received on an input terminal and a current output provided on first and second output terminals, at least one of the first and second output terminals connected in feedback to the input terminal, the transconductance amplifier including;

a voltage gain stage coupled to the input;

at least one transconductance stage connected to the output of an voltage gain stage;

a plurality of current gain stages cascade-connected to an output of a last connected of the at least one transconductance stage; and

a load capacitor, connected between the first and second output terminals of the transconductance amplifier, that controls a bandwidth of the reference buffer.