Removal of particulate contamination in loadlocks

• US 5,858,108 A
• Filed: 07/15/1996
• Issued: 01/12/1999
• Est. Priority Date: 07/15/1996
• Status: Expired due to Term

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Hwang, Yuan-ko
• Primary Examiner(s): Warden, Jill
• Assistant Examiner(s): Markoff, Alexander
• Application Number:
  US08/679,913
• Time in Patent Office: 911 Days
• Field of Search: 134/1.3, 134/1, 134/21, 134/34, 134/37, 134/2
• US Class Current: 134/1.3
• CPC Class Codes: B08B 6/00 Cleaning by electrostatic means domestic cleaning implements functioning electrostatically A47L13/40; cleaning of grooved record carriers G11B3/58
• CPC Class Codes: H01L 21/67028 for cleaning followed by drying, rinsing, stripping, blasting or the like
• CPC Class Codes: Y10S 134/902 Semiconductor wafer
• CPC Class Codes: Y10S 438/906 Cleaning of wafer as interim step

Abstract

The invention teaches the removal of dust particles during semiconductor processing without the need to modify the processing chambers or to wait until they are not being used for their normal purposes. The dust removal operation is performed inside loadlocks instead the processing chambers. Dust removal, in a loadlock, is accomplished by first initiating a flow of gas over the wafer surface. Then a negative charge is induced at the surface for a period of time followed by the induction of a positive charge. This causes the charged particles to be repelled away from the surface, at which point they are swept away by the gas. To remove the electrically neutral dust particles, the induced surface charge is switched too rapidly for these particles to follow, so they are briefly repelled from the surface and then swept away by the gas.

Claims

1. A method for removing dust particles from a semiconductor wafer'"'"'s surface consisting essentially of the steps:

(a) placing the wafer in a loadlock and resting it on a support that is electrically isolated from other parts of said loadlock including its walls;

(b) providing a voltage source between said support and a ground;

(c) causing a gas having a pressure to flow over said surface, thereby swiping away from said surface particles not electrostatically attracted to said surface;

(d) applying a negative voltage to said surface by said voltage source for a first time period, thereby repelling negatively charged particles;

(e) causing said voltage source to change its bias, and thereby applying a positive voltage to said surface for a second time period, thereby repelling positively charged particles;

(f) alternating application of negative and positive voltages to the surface by causing said voltage source to change its bias, thereby repelling particles having no net charge, wherein the voltage source changes its bias within a third time period and

wherein the application of said voltages is conducted during flowing of the gas;

(g) terminating said voltages application and causing the gas to no longer flow;

(h) evacuating said loadlock to obtain a vacuum therein;

(i) admitting atmospheric air into the loadlock; and

removing the wafer from the loadlock.

2. The method of claim 1 wherein said first time period is between about 0.5 and 5 seconds.

3. The method of claim 1 wherein said second time period is between about 0.5 and 5 seconds.

4. The method of claim 1 wherein said third time period is less than about 0.1 milliseconds.

5. The method of claim 1 wherein the vacuum obtained in step (h) is less than about 0.1 torr.

6. The method of claim 1 wherein the gas flows at a rate that is between about 500 and 4,000 SCCM.

7. The method of claim 1 wherein said gas pressure is between about 5 and 20 torr.

8. The method of claim 1 wherein the positive voltage is between about 100 and 500 volts.

9. The method of claim 1 wherein the negative voltage is between about 100 and 500 volts.