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Method and apparatus for computing minimum wirelength position (MWP) for cell in cell placement for integrated circuit chip

  • US 5,859,781 A
  • Filed: 08/01/1996
  • Issued: 01/12/1999
  • Est. Priority Date: 09/13/1994
  • Status: Expired due to Term
First Claim
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1. A method of positioning a cell in a cell placement for an integrated circuit chip such that a total wirelength for interconnect nets that are connected to said cell is substantially minimum, comprising steps of:

  • (a) constructing bounding boxes around said interconnect nets with said cell excluded respectively;

    (b) computing vertical and horizontal median intervals of said bounding boxes within which said total wirelength is substantially invariant; and

    (c) positioning said cell in said median intervals.

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