Active matrix color display with multiple cells and connection through substrate

• US 5,861,929 A
• Filed: 11/04/1992
• Issued: 01/19/1999
• Est. Priority Date: 12/31/1990
• Status: Expired due to Term

• Current Assignee: Kopin Corporation
• Original Assignee: Kopin Corporation
• Inventors: Spitzer, Mark B.
• Primary Examiner(s): Gross, Anita Pellman
• Assistant Examiner(s): Parker, Kenneth
• Application Number:
  US07/970,694
• Time in Patent Office: 2,267 Days
• Field of Search: 359/88, 359/53, 359/72, 349/74, 349/149, 349/152
• US Class Current: 349/74
• CPC Class Codes: G02B 2027/0198 System for aligning or maintaining alignment of an image in a predetermined direction
• CPC Class Codes: G02B 27/0093 with means for monitoring data relating to the user, e.g. head-tracking, eye-tracking
• CPC Class Codes: G02F 1/1345 Conductors connecting electrodes to cell terminals
• CPC Class Codes: G02F 1/13454 Drivers integrated on the active matrix substrate G02F1/136277 takes precedence
• CPC Class Codes: G02F 1/1347 Arrangement of liquid crystal layers or cells in which the final condition of one light beam is achieved by the addition of the effects of two or more layers or cells
• CPC Class Codes: G02F 1/13473 for wavelength filtering or for colour display without the use of colour mosaic filters
• CPC Class Codes: G02F 1/13613 the semiconductor element being formed on a first substrate and thereafter transferred to the final cell substrate
• CPC Class Codes: G02F 1/136209 Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
• CPC Class Codes: G09G 2300/023 Display panel composed of stacked panels
• CPC Class Codes: G09G 2300/0809 Several active elements per pixel in active matrix panels
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2310/0259 with use of an analog or digital ramp generator in the column driver or in the pixel circuit
• CPC Class Codes: G09G 2320/0233 Improving the luminance or brightness uniformity across the screen
• CPC Class Codes: G09G 2320/041 Temperature compensation
• CPC Class Codes: G09G 2320/043 Preventing or counteracting the effects of ageing
• CPC Class Codes: G09G 2340/0464 Positioning
• CPC Class Codes: G09G 3/30 using electroluminescent panels
• CPC Class Codes: G09G 3/36 using liquid crystals
• CPC Class Codes: G09G 3/3607 for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels display of colours in flat matrix panels other than liquid crystal displays G09G3/2003; grey scales specific for television H04N3/127
• CPC Class Codes: G09G 3/3614 Control of polarity reversal in general
• CPC Class Codes: G09G 3/3648 : using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: H01L 2221/6835 : used as a support during build up manufacturing of active devices
• CPC Class Codes: H01L 2221/68359 : used as a support during manufacture of interconnect decals or build up layers
• CPC Class Codes: H01L 27/1214 : comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1266 : the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate
• CPC Class Codes: H01L 27/156 : two-dimensional arrays
• CPC Class Codes: H01L 29/786 : Thin film transistors, i.e. transistors with a channel being at least partly a thin film transistors having only the source or the drain region on an insulator layer H01L29/0653; thin film FinFETs H01L29/785
• CPC Class Codes: H01L 29/78603 : characterised by the insulating substrate or support H01L29/78657 takes precedence
• CPC Class Codes: H04N 5/70 : Circuit details for electroluminescent devices
• CPC Class Codes: H04N 5/7441 : the modulator being an array of liquid crystal cells
• CPC Class Codes: H04N 5/7491 : of head mounted projectors
• CPC Class Codes: H04N 9/3141 : Constructional details thereof details not peculiar to the presence of an electronic spatial light modulator G03B21/14

Abstract

A color active matrix display system including a plurality of active matrix arrays that are stacked around a liquid crystal material, vertically aligned and interconnected to provide a high resolution color display system.

Claims

1. A liquid crystal subtractive color display comprising:

a first active matrix array of first pixel SOI circuits and first pixel electrodes, the first pixel circuits being formed in a first thin film of single crystal silicon that is bonded to a first optically transmissive substrate with and adhesive layer;

a first driver circuit formed with the first thin film of single crystal silicon that is bonded to the first optically transmissive substrate, the first driver circuit having a row driver and a column driver;

a second active matrix array of second pixel SOI circuits and second pixel electrodes, the second pixel electrodes, the second pixel circuits being formed in a second thin film of single crystal silicon and bonded to a second optically transmissive substrate with an adhesive layer, the second active matrix array being aligned with the first active matrix array;

a second circuit formed with the second thin film of single crystal silicon that is bonded to the second optically transmissive substrate, the second driver circuit having a second row driver and a second column driver;

an interconnect between the first driver circuit and the second driver circuit that extends through the second optically transmissive substrate; and

a first layer of liquid crystal material actuated by the first active matrix and a second layer of liquid crystal material actuated by the second active matrix to provide a subtractive color liquid crystal display.

2. The liquid crystal display of claim 1 further comprising a third active matrix array having third pixel circuits and third pixel electrodes, the third active matrix array being formed in a third thin film of single crystal silicon.

3. The liquid crystal display of claim 2 further comprising a third layer of liquid crystal material adjacent the third active matrix.

4. The liquid crystal display of claim 2 further comprising a third driver circuit formed in the third thin film of single crystal silicon.

5. The liquid crystal display of claim 1 further comprising an optical interconnect circuit between the first active matrix and the second active matrix.

6. A method of making a liquid crystal subtractive color driver comprising:

forming a first active matrix array of first pixel SOI circuits, second driver circuits and first pixel electrodes, the first pixel circuits and first driver circuits being formed in a first thin film of single crystal silicon that is bonded to a first optically transmissive substrate;

forming a second active matrix array of second pixel SOI circuits, second driver circuits and second pixel electrodes, the second pixel circuits and second driver circuits being formed in a second thin film of single crystal silicon that is bonded to a second optically transmissive substrate;

aligning the second active matrix array over the first active matrix array to form a stacked display structure;

interconnecting the first driver circuit and the second driver circuit with an interconnect extending through the second optically transmissive substrate such that the first driver circuit drives the first pixel SOI circuits and the second driver circuit drives the second pixel SOI circuits; and

positioning a first layer of liquid crystal material in a cavity adjacent to by the first active matrix and positioning a second layer of liquid crystal material adjacent to the second active matrix to provide a subtractive color liquid crystal display.

7. The method of claim 6 further forming a third active matrix array having third pixel circuits and third pixel electrodes, the third active matrix array being formed in a third thin film of single crystal silicon.

8. The method of claim 7 further comprising positioning a third layer of liquid crystal material adjacent the third active matrix.

9. The method of claim 7 further comprising forming the first active matrix array with a thin film of single crystal silicon over an insulating substrate and transferring the single crystal material onto the first optially transmissive substrate.

10. The method of claim 6 further comprising forming an optical interconnect circuit between the first active matrix and the second active matrix.

11. A method of making a liquid crystal subtractive color display comprising:

providing a light source;

forming a first active matrix array of first pixel circuits, a first SOI driver circuit and first pixel electrodes, the first driver and the first pixel circuits being formed in a first thin film of single crystal silicon that is bonded to a first optically transmissive substrate with an adhesive layer to provide a first display element;

forming a second active matrix array of second pixel circuits, a second SOI driver circuit, and second pixel electrodes, the second driver circuit and the second pixel circuits being formed in second thin film of single crystal silicon and bonded to a second optically transmissive substrate with a second adhesive layer to provide a second display element;

aligning the second active matrix over the first active matrix array and bonding the first display element to the second display element with a third adhesive layer to form a stacked display structure;

interconnecting the first SOI driver circuit and the second SOI driver circuit with an interconnect extending through the second optically transmissive substrate; and

positioning a liquid crystal material in a cavity adjacent to the first active matrix and positioning a second layer of liquid crystal material adjacent to the second active matrix to provide a color liquid crystal display that is optically coupled to the light source.

12. The method of claim 11 further forming a third active matrix array having third pixel circuits and third pixel electrodes, the third active matrix array being formed in a third thin film of single crystal silicon.