Display system and circuit therefor
First Claim
Patent Images
1. A display system comprising:
- a display having a display with a display screen area upon which images can be generated for viewing; and
an image control circuit controlling operation of the display, the image control circuit controlling the display such that only a partial display area can be controlled to generate images in a first operating mode to conserve power and all of the display screen area can be controlled to generate images in a second operating mode;
wherein the image control circuit includes a first buffer storing pixel control signals for the partial display area, and the first buffer passes image control signals through to a pixel scanning controller in the second operating mode, and stores pixel control signals for the partial display area in the first operating mode.
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Accused Products
Abstract
A display system includes a display panel (200) having a full display screen area (303) upon which images can be generated for viewing. An image control circuit (400, 501) controls the operation of the display panel such that only a partial display field, or area, (305) is controlled to generate images in a first operating mode to conserve power and the full display screen area is controlled to generate images in a second operating mode.
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Citations
23 Claims
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1. A display system comprising:
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a display having a display with a display screen area upon which images can be generated for viewing; and an image control circuit controlling operation of the display, the image control circuit controlling the display such that only a partial display area can be controlled to generate images in a first operating mode to conserve power and all of the display screen area can be controlled to generate images in a second operating mode; wherein the image control circuit includes a first buffer storing pixel control signals for the partial display area, and the first buffer passes image control signals through to a pixel scanning controller in the second operating mode, and stores pixel control signals for the partial display area in the first operating mode. - View Dependent Claims (2, 3, 4, 5)
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6. A display system comprising:
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a display having a display with a display screen area upon which images can be generated for viewing; and an image control circuit controlling operation of the display, the image control circuit controlling the display such that only a partial display area can be controlled to generate images in a first operating mode to conserve power and all of the display screen area can be controlled to generate images in a second operating mode; wherein the image control circuit includes a first buffer storing pixel control signals for the partial display area, and an output of the first buffer is connected to a pixel scanning controller through a switch. - View Dependent Claims (7)
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8. A battery powered device comprising:
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a display having a display screen area; a first display image buffer storing pixel control signals for all of the display screen area; a second display image buffer, the second display image buffer being smaller than the first display image buffer, wherein the second display image buffer has sufficient capacity to store pixel control signals for only a portion of the display screen area; and a control circuit to selectively provide pixel control signals from the first and second display image buffers to the display. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. An image control circuit comprising:
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a pixel signal input; a memory storing pixel signals for a portion of a display screen; a pixel fill circuit outputting pixel off data; and a control circuit coupled to the pixel signal input, the memory and the pixel fill circuit, the control circuit including a combiner selectively combining the pixel signals from the memory and the pixel off data, the combiner outputting an image sequence received at the pixel signal input in a full image mode and outputting pixel off data and pixel signals from the memory in a partial display mode; further including a display image buffer storing pixel signals all of the display screen in a full display mode, the pixel signal input coupled to the display image buffer.
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16. An image control circuit comprising:
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a pixel signal input; a memory storing pixel signals for a portion of a display screen; a pixel fill circuit outputting pixel off data; and a control circuit coupled to the pixel signal input, the memory and the pixel fill circuit, the control circuit including a combiner selectively combining the pixel signals from the memory and the pixel off data, the combiner outputting an image sequence received at the pixel signal input in a full image mode and outputting pixel off data and pixel signals from the memory in a partial display mode; wherein the pixel fill circuit comprises a register storing pixel off signals. - View Dependent Claims (17, 18, 19, 20, 21, 22, 23)
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Specification