Non-linear carrier controllers for high power factor rectification

• US 5,867,379 A
• Filed: 01/12/1995
• Issued: 02/02/1999
• Est. Priority Date: 01/12/1995
• Status: Expired due to Fees

• Current Assignee: University of Colorado
• Original Assignee: University of Colorado
• Inventors: Jang, Yungtaek, Erickson, Robert W., Maksimovic, Dragan
• Primary Examiner(s): Wong, Peter S.
• Assistant Examiner(s): Patel, Rajnikant B.
• Application Number:
  US08/371,822
• Time in Patent Office: 1,482 Days
• Field of Search: 363/21, 363/89, 363/95, 323/222, 323/285
• US Class Current: 363/89
• CPC Class Codes: H02M 1/4225 using a non-isolated boost converter
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

This patent disclosure describes new non-linear carrier-pulse-width modulators for control of high power-factor boost rectifiers. In the new modulators, the switch duty ratio is determined by comparing a signal derived from the main switch current with a periodic, nonlinear carrier signal ν_c (t, ν_m). The shape of the carrier is selected so that the resulting input current follows the input voltage, as required for unity-power-factor rectification. A slowly-varying modulating input ν_m can be used to adjust the power level and to regulate the output dc voltage. The controller based on the new non-linear-carrier modulator has a number of advantageous properties: sensing of the input line voltage is eliminated; for current shaping, only sensing of the power switch current is needed; current shaping does not require an error amplifier with feedback loop compensation; the multiplier in the voltage feedback loop is eliminated; and the converter operates in the continuous conduction mode. The controller is potentially well-suited for integrated-circuit implementation. It can be expected that a dedicated IC based on the feed-forward modulators disclosed here would be simpler and would require less i/o pins than ICs currently available for power-factor correction, while offering comparable or improved performance.

Claims

1. In a boost rectifier a method to emulate a resistive load on the input power line comprising the steps of:

sensing a current of a switching means which is located inside the rectifier;

integrating the sensed switch current to compute a voltage (V_q);

sensing a negative of the rectifier output voltage and summing it with a reference voltage thereby yielding an error voltage;

amplifying the error voltage with a voltage loop error amplifier to obtain a carrier generator input voltage (V_m);

generating a non-linear carrier waveform (V_c (t)) whose amplitude is proportional to the carrier generator input voltage (V_m) according to the formula;

##EQU19## where t=time from the beginning of the switching period and T_s =the switching period;

using a clock to set a flip flop to turn on the switching means at the beginning of each switching period; and

comparing Voltage (V_q) with non-linear carrier waveform (V_c (t)) and resetting the flip flop to turn off the switching means when (V_q) exceeds (V_c (t)).

2. In a boost rectifier a method to emulate a resistive load on the input power line comprising the steps of:

sensing a current of a switching means which is located inside the rectifier, producing a voltage (V_s) proportional to the current of the switch means;

sensing a negative of the rectifier output voltage (V) and summing it with a reference voltage thereby yielding an error voltage;

amplifying the error voltage with a voltage loop error amplifier to obtain a carrier generator input voltage (V_m);

generating a non-linear carrier waveform (V_c (t)) whose amplitude is proportional to the carrier generator input voltage (V_m) according to the formula;

V_c (t)=(V_m +Kt/T_s (1-t/T_s) where T_s =the switching period and t=time from the beginning of the switching period, K=VR_s /2Lf_s where V=the output voltage of the boost rectifier, R_s =the switch current sense resistor, L=the series inductor of the boost rectifier, and f_s =the switching frequency;

using a clock to set a flip flop to turn on the switching means at the beginning of each switching period; and

comparing Voltage (V_s) with parabolic carrier waveform (V_c (t)) and resetting the flip flop to turn off the switching means when (V_s) exceeds (V_c (t)).

3. The process of claim 2 further comprising the step of limiting the current of the switching means by means of adding a zener diode between the output of the carrier generator (V_c (t)) and ground.

4. In a boost rectifier an apparatus to emulate a resistive load on the input power line comprising:

means for sensing a current of a switching means which is located inside the rectifier;

means for integrating the sensed switch current to compute a voltage (V_q);

means for sensing a negative of the rectifier output voltage and summing it with a reference voltage thereby yielding an error voltage;

means for amplifying the error voltage with a voltage loop error amplifier to obtain a carrier generator input voltage (V_m);

means for generating a non-linear carrier waveform (V_c (t)) whose amplitude is proportional to the carrier generator input voltage (V_m) according to the formula;

##EQU20## where t=time from the beginning of the switching period and T_s =the switching period;

means for using a clock to set a flip flop to turn on the switching means at the beginning of each switching period; and

means for comparing Voltage (V_q) with non-linear carrier waveform (V_c (t)) and resetting the flip flop to turn off the switching means when (V_q) exceeds (V_c (t)).

7. The apparatus of claim 4 wherein said current sensing means further comprises a sense resistor.

8. The apparatus of claim 4 wherein said integrating means further comprises an integrator with a reset switch.

9. The apparatus of claim 4 wherein the means for sensing a negative of the rectifier output voltage, and summing it with a reference voltage thereby yielding an error voltage, and a means for amplifying the error voltage further comprises an amplifier.

10. The apparatus of claim 4 wherein said means for generating a non-linear carrier waveform (V_c (t)) according to the formula, ##EQU21## further comprises a circuit comprising:

a first current source controlled by the generator input voltage (V_m);

a summing junction having a positive and a negative input, and an output;

said generator input voltage (V_m) connected to said negative input of said summing junction, and to a point of reference potential;

said first current source connected between said positive input to said summing junction and said point of reference potential;

a first capacitor connected between said positive input to said summing junction and said point of reference potential;

a switch controlled by an external clock and connected between said positive input to said summing junction and said point of reference potential;

a second current source controlled by said output of said summing junction;

said current source connected between said non-linear carrier waveform V_c (t) and said point of reference potential;

a second capacitor connected between said non-linear carrier waveform V_c (t) and said point of reference potential; and

a second switch controlled by an external clock and connected between said non-linear carrier waveform V_c (t) and said point of reference potential.

5. In a boost rectifier an apparatus to emulate a resistive load on the input power line comprising:

means for sensing a current of a switching means which is located inside the rectifier, producing a voltage (V_s) proportional to the current of the switch means;

means for sensing a negative of the rectifier output voltage (V) and summing it with a reference voltage thereby yielding an error voltage;

means for amplifying the error voltage with a voltage loop error amplifier to obtain a carrier generator input voltage (V_m);

means for generating a non-linear carrier waveform (V_c (t)) whose amplitude is proportional to the carrier generator input voltage (V_m) according to the formula;

V_c (t)=(V_m +Kt/T_s)(1-t/T_s) where T_s =the switching period and t=time from the beginning of the switching period, K=VR_s /2Lf_s where V=the output voltage of the boost rectifier, R_s =the switch current sense resistor, L=the series inductor of the boost rectifier, and f_s =the switching frequency;

means for using a clock to set a flip flop to turn on the switching means at the beginning of each switching period; and

means for comparing Voltage (V_s) with non-linear carrier waveform (V_c (t)) and resetting the flip flop to turn off the switching means when (V_s) exceeds (V_c (t)).

6. The apparatus of claim 5 further comprising means for limiting the current of the switching means by means of adding a zener diode between the output of the carrier generator (V_c (t)) and ground.

11. The apparatus of claim 5 wherein said current sensing means further comprises a sense resistor.

12. The apparatus of claim 5 wherein the means for sensing a negative of the rectifier output voltage, and summing it with a reference voltage thereby yielding an error voltage, and a means for amplifying the error voltage further comprises an amplifier.

13. The apparatus of claim 5 wherein said means for generating a non-linear carrier waveform (V_c (t)) according to the formula, ##EQU22## further comprises:

a first current source;

a first and second summing junction each having positive and negative inputs, and each has an output;

said generator input voltage (V_m) connected to a positive input to said first and second summing junction, and to a point of reference potential;

said K further comprising a connection to the negative input of said first summing junction;

said first current source connected between a second positive input to said first summing junction and said point of reference potential;

a first capacitor connected between said second positive input to said first summing junction and said point of reference potential;

a switch controlled by an external clock and connected between said second positive input to said first summing junction and said point of reference potential;

a second current source controlled by said output of said first summing junction;

said current source connected between a second positive input to said second summing junction and said point of reference potential;

a second capacitor connected between said second positive input to said second summing junction and said point of reference potential;

a second switch controlled by an external clock and connected between said second positive input to said second summing junction and said point of reference potential; and

the output of said second summing junction further comprises the non-linear carrier waveform (V_c (t)).