System control apparatus including a master control unit and a slave control unit which maintain coherent information

• US 5,870,301 A
• Filed: 01/17/1996
• Issued: 02/09/1999
• Est. Priority Date: 03/30/1995
• Status: Expired due to Term

• Current Assignee: Fujitsu Limited
• Original Assignee: Fujitsu Limited
• Inventors: Yakushiji, Hiroshi, Osaki, Tomoko, Sato, Reiko, Iwawaki, Masato
• Primary Examiner(s): Elmore, Reba I.
• Assistant Examiner(s): Dolan, Robert J.
• Application Number:
  US08/588,006
• Time in Patent Office: 1,119 Days
• Field of Search: 395/200.05, 395/200.07, 395/183.07, 395/182.09, 395/200.38, 395/200.42, 364/132, 364/133
• US Class Current: 700/3
• CPC Class Codes: G06F 11/0757 by exceeding a time limit, i.e. time-out, e.g. watchdogs
• CPC Class Codes: G06F 11/1637 using additional compare functionality in one or some but not all of the redundant processing components
• CPC Class Codes: G06F 11/165 with continued operation after detection of the error
• CPC Class Codes: G06F 11/1658 Data re-synchronization of a redundant component, or initial sync of replacement, additional or spare unit
• CPC Class Codes: G06F 11/1687 at event level, e.g. by interrupt or result of polling
• CPC Class Codes: G06F 11/2028 eliminating a faulty processor or activating a spare
• CPC Class Codes: G06F 11/2038 with a single idle spare processing component

Abstract

In the master control unit, updated information is transferred to a slave control unit and a coherence of information between the master control unit and the slave control unit is periodically checked, thereby eliminating a difference of the internal information of the two units which execute a control, a status monitor, and a maintenance of a computer system in an on-line manner and guaranteeing the coherence. When the master control unit recognizes a difference between the information for a predetermined time or more, the slave control unit is halted and the information of the master control unit is made effective. With respect to an abnormality of the master control unit, the master control unit halts by itself. In this instance, the slave control unit is shifted to the master status and takes over the process.

Claims

1. A system control apparatus, comprising:

a master control unit to perform control, status monitoring, and maintenance of a computer system; and

a slave control unit to operate in parallel with said master control unit and operate as a standby system while maintaining coherence of information with said master control unit, each of said master control unit and said slave control unit having an operation processing module for executing a process corresponding to a requested operation when receiving an operation instruction from said computer system,

wherein upon transmission of the operation instruction from the computer system to said master control unit, the master control unit activates a corresponding operation processing module and the operation processing module of said slave control unit, subsequently starts the execution of an operation process of said master control unit, and simultaneously transmits parameter data of said operation instruction to said slave control unit, thereby realizing a double execution of the process,

wherein said master control unit includes a queue to store said operation instruction and when the operation processing module of said master control unit receives the operation instruction from said computer system, said operation instruction is stored into said queue, and the parameter data is subsequently transferred between said master control unit and said slave control unit, and

wherein the master control unit starts the self operation process and instructs the slave control unit to start the operation process when said operation instruction is stored into the queue.

2. An apparatus according to claim 1, wherein said master control unit and said slave control unit are connected through a first bus which is used to maintain the coherence of said information, and each of said master control unit and said slave control unit is individually connected to said computer system through an exclusive-use bus.

3. An apparatus according to claim 1, wherein each of said master control unit and said slave control unit has a status transition processing module, each status transition processing module has a status of at least initialize, master, slave, and halt, and in the case where a master installing position is recognized in an initialize status just after a power source is turned on, said status transition processing module is shifted to the master status, and in a case where the slave installing position is recognized, a transition of the other unit to the master status is confirmed and, after that, the status transition processing module is shifted to the slave status.

4. An apparatus according to claim 3, wherein said status transition processing module shifts itself to the halt status when a self abnormality is recognized, provides a halt instruction to said other unit and thereby shifts said other unit to the halt status when an abnormality of the other unit is recognized, and shifts itself to the master status in the case where the other unit which performed the halt instruction is a master control unit.

5. An apparatus according to claim 3, wherein,

each of said master control unit and said slave control unit has an information transmitting/receiving module which is constructed in a manner such that when shifting to the slave status by said status transition processing module, a transfer of information to guarantee the coherence is requested from the other unit which has already been shifted to the master status and when shifting to the master status, the corresponding information is transferred in response to the transfer request of the information to keep the coherence from the other unit.

6. An apparatus according to claim 3, wherein each of said master control unit and said slave control unit has an updating information transfer module which is constructed in a manddddner such that after the unit is shifted to the master status by said status transition processing module, when the updating of information to guarantee the coherence is recognized, the updated information is transferred to the other unit which has already been shifted to the slave status.

7. An apparatus according to claim 3, wherein each of said master control unit and said slave control unit further includes a coherence checking module to periodically check coherences such that when the unit is shifted to the master status by said status transition processing module, the information of the other unit which has already been shifted to the slave status and the self information are compared at every predetermined time.

8. An apparatus according to claim 7, wherein when the compared information differs for a predetermined time or more, said coherence checking module provides a halt instruction to the other unit which has already been shifted to the slave status, thereby allowing said other unit to halt.

9. The apparatus according to claim 1, wherein when said computer system transmits the operation instruction to said slave control unit, the slave control unit which receives said operation instruction activates the self operation processing module and the operation processing module of said master control unit and subsequently transmits parameter data of said operation instruction to said master control unit, and said master control unit starts the self operation process after completion of the reception of said parameter data and, at the same time, instructs the slave control unit to start the operation process, thereby realizing a double execution of the process.

10. The apparatus according to claim 1, wherein in the case where the operations received by said master control unit and said slave control unit are executed, after completion of the execution of the operation, said slave control unit notifies the end of the operation to said master control unit, and when said master control unit finishes the self operation and receives the end notification of the operation from the slave control unit, the master control unit recognizes the end of the execution of the operations of both of said control units and clears said queue and, further, notifies said computer system of the end of the operations.

11. The apparatus according to claim 1, wherein when the received operation instruction is stored into said queue, said master control unit discriminates whether the same operation is at present being executed or not, and when the same operation is being executed, it is judged that the operation was double generated, so that the double generation is notified to said computer system without executing the received operation.

12. The apparatus according to claim 1, wherein in the case where an event to be notified to said computer system occurs on the basis of a status monitor, processes for said event are executed by both of said master control unit and said slave control unit, and after completion of the process, said slave control unit notifies the master control unit of the occurrence of the event, and when the master control unit finishes the self process and receives the notification of the occurrence of the event from the slave control unit, said master control unit recognizes that the processes for occurrence of the event are finished in both of said control units, and notifies said computer system of the occurrence of the event.

13. An apparatus according to claim 12, wherein when said master control unit finishes the self process for the event occurrence, in the case where the notification of the event occurrence from said slave control unit is not received, the master control unit activates a timer and monitors the time, and in the case where there is no notification of the event occurrence from the slave control unit even after the elapse of a predetermined time, it is judged that the slave control unit is abnormal, thereby halting the slave control unit by a halt instruction, and the master control unit regards that the self process is normally finished, and notifies said computer system of the occurrence of the event.

14. An apparatus according to claim 12, wherein when said master control unit finishes the self process for the event occurrence and receives the notification of the event occurrence from said slave control unit, the event occurrence notifications or both of said units are compared and when they are different, it is regarded that the slave control unit is abnormal and the slave control unit is halted by a halt instruction, and the master control unit regards that the self process is normally finished, and notifies said computer system of event occurrence.

15. An apparatus according to claim 12, wherein during the execution of the process of the event, when said master control unit recognizes that the slave control unit which is simultaneously executing the process of the event occurred causes a status abnormality and is shifted to the halt status, said master control unit regards the self process as finished, and notifies said computer system of the occurrence of the event.

16. The apparatus according to claim 1, wherein when said master control unit finishes the self process, if notification of an end of the operation process from said slave control unit is not received, the master control unit activates a timer and monitors the time and, in the case where there is no end notification of the process from the slave control unit even after the elapse of a predetermined time, it is judged that the slave control unit is abnormal, thereby halting the slave control unit by a halt instruction, and the master control unit itself regards that the self process is normally finished, clears the operation stored in said queue, and further notifies said computer system of the end of the process.

17. The apparatus according to claim 1, wherein when said master control unit finishes the self operation process and receives the end notification of the operation process from said slave control unit, process information of both of said units is compared and when they are different, it is regarded that the slave control unit is abnormal and the slave control unit is halted by a halt instruction, and the master control unit regards that the self process is normally finished, clears the operation stored in said queue, and further notifies said computer system of the end of the process.

18. The apparatus according to claim 1, wherein when an abnormality is detected during the transfer of the parameter data in association with the operation instruction from said slave control unit to said master control unit, the slave control unit halts itself and the master control unit finishes operations stored in said queue.

19. The apparatus according to claim 1, wherein during the execution of the operation process, when said master control unit recognizes that the slave control unit which is simultaneously executing the operation process causes a status abnormality and is shifted to the halt status, the master control unit clears the operation stored in said queue and notifies said computer system of the end of the process.

20. The apparatus according to claim 1, wherein during the execution of the process, when said slave control unit detects that the master control unit causes a status abnormality and is shifted to the halt status, the slave control unit resigns the presently executed process and shifts the self status from the slave status to the master status.