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Efficient parallel-stage power amplifier

DC
  • US 5,872,481 A
  • Filed: 12/09/1996
  • Issued: 02/16/1999
  • Est. Priority Date: 12/27/1995
  • Status: Expired due to Term
First Claim
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1. An amplifier circuit for providing an amplified signal in response to a radio frequency (RF) input signal having successive portions separated by signal boundaries, said amplifier circuit comprising:

  • a timing information input line receiving timing information representative of the boundaries between the portions of the RF input signal;

    a plurality of amplifier stages for amplifying said RF input signal, each of said plurality of amplifier stages having an amplifier stage input for receiving said RF input signal and an amplifier stage output for providing an amplified RF signal, each of said amplifier stages operative to amplify the RF input signal only while a direct current (DC) bias is applied to the respective amplifier stage input thereof;

    a control circuit, coupled to each amplifier stage input of said plurality of amplifier stages and to the timing information input line, for selecting particular amplifier stages to be activated and for providing a DC bias to the amplifier input stages of each of the selected amplifier stages, said control circuit operative to vary the selection of particular amplifier stages only during a boundary between portions of the RF input signal; and

    means, coupled to each of said amplifier stage inputs, for isolating said DC bias from the amplifier input stages of other ones of said plurality of amplifier stages.

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