Thermal stress relieving substrate

• US 5,874,776 A
• Filed: 04/21/1997
• Issued: 02/23/1999
• Est. Priority Date: 04/21/1997
• Status: Expired due to Term

• Current Assignee: GlobalFoundries, Inc.
• Original Assignee: International Business Machines Corporation
• Inventors: Wilcox, James R., Kresge, John S.
• Primary Examiner(s): Saadat, Mahshid
• Assistant Examiner(s): CLARK, SHEILA V
• Application Number:
  US08/840,481
• Time in Patent Office: 673 Days
• Field of Search: 257/747, 257/731, 257/669, 438/50, 438/125, 438/121, 438/108
• US Class Current: 257/747
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 23/3733 having a heterogeneous or anisotropic structure, e.g. powder or fibres in a matrix, wire mesh, porous structures H01L23/3732, H01L23/3737 take precedence
• CPC Class Codes: H01L 23/49827 Via connections through the substrates, e.g. pins going through the substrate, coaxial cables H01L23/49822, H01L23/49833, H01L23/4985, H01L23/49861 take precedence
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/10253 Silicon [Si]
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA
• CPC Class Codes: H05K 1/0271 Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
• CPC Class Codes: H05K 1/05 Insulated conductive substrates, e.g. insulated metal substrate
• CPC Class Codes: H05K 3/3436 having an array of bottom contacts, e.g. pad grid array or ball grid array components

Abstract

A substrate for connecting one element having a first coefficient of thermal expansion to another element having a differing coefficient of thermal expansion that will alleviate interconnection problems due to thermal mismatch.

Claims

1. A chip carrier comprising:

a substrate with a coefficient of thermal expansion compensation plate having means to provide a variable in-plane stiffness to accommodate thermal expansion mismatch between elements on the substrate to either side of the compensation plate.

2. A chip carrier comprises:

a substrate with a coefficient of thermal expansion plate having means to provide a variable in-plane stiffness to accommodate thermal expansion mismatch of elements attached to said substrate.

3. A thermal stress relieving device comprising:

a plate constructed so as to have a variable in-plane stiffness from its inner areas to its outer periphery.

4. The device of claim 3 wherein said plate is further characterized in having a increased stiffness at its inner area and a gradually decreasing stiffness from said inner area to its outer periphery.

5. The device of claim 3 having means to vary the density of material in said plate in a portion thereof in relation to that in said plate in other portions thereof.

6. The device of claim 5 wherein said means to vary the density of material are holes through said plate having a controlled variation in hole size and spacing.

7. The device of claim 6 wherein said holes are at a constant hole pitch and have a systematically increasing hole diameter.

8. The device of claim 6 wherein said holes have a constant diameter and a steadily decreasing hole pitch.

9. A method to reduce the thermal expansion mismatch between one element and a second element, said method comprising the steps of:

constructing a substrate using a low coefficient of thermal expansion plate, determining the coefficient of thermal expansion of said one element and said second element, selectively removing portions of the plate so that the in-plane stiffness of said plate will constrain the thermal expansion of the substrate differently in respective areas of attachment of said one element and said second element.

10. The method of claim 9 and further characterized by forming holes through said compensator plate by maintaining hole pitch constant and systematically increasing hole diameter from the compensator plate'"'"'s inner area toward the compensator plate'"'"'s periphery.

11. The method of claim 9 and further characterized by forming holes through said compensator plate by steadily decreasing hole pitch of constant diameter holes from one portion of the compensator plate to another portion of the compensator plate.

12. The method of claim 9 and further characterized by drilling to remove portions of the compensator plate.

13. The method of claim 9 and further characterized by etching preselected hole patterns in said compensator plate.