Processor using implicit register addressing
First Claim
1. A computer comprising:
- a data read section including plural registers for receiving a command obtained from outside, and outputting stored data of said plural registers selectively as read data based on said command, said command containing a special command implicitly referencing registers for reading out stored data; and
a data operation section for operating according to said read data to output an operation result;
wherein said data read section specifies two registers out of said plural registers as first and second specific registers when said command is said special command, and for outputting first stored data which is stored data of said first specific register and second stored data which is stored data of said second specific register as said read data.
2 Assignments
0 Petitions
Accused Products
Abstract
To obtain a high performance computer decreased in the number of commands to be executed. A control circuit receives a command (CMD), and outputs a special command signal which becomes "H" when the command (CMD) instructs "push" command, to a register file. The register file, when the special command signal is "H", outputs the stored data value of register as register data regardless of the values of read register address signals, and and outputs the stored data value of register as register data. An ALU adds the register data and control data, and outputs the ALU operation result to the register file. An address adder adds the register data and control data, and outputs the address addition result to an external memory.
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Citations
16 Claims
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1. A computer comprising:
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a data read section including plural registers for receiving a command obtained from outside, and outputting stored data of said plural registers selectively as read data based on said command, said command containing a special command implicitly referencing registers for reading out stored data; and a data operation section for operating according to said read data to output an operation result; wherein said data read section specifies two registers out of said plural registers as first and second specific registers when said command is said special command, and for outputting first stored data which is stored data of said first specific register and second stored data which is stored data of said second specific register as said read data. - View Dependent Claims (2, 3, 4)
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5. A computer comprising:
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a data read section including plural registers for outputting stored data of said plural registers selectively as read data based on a command obtained from outside, said command containing a special command implicitly referencing a reference register for reading out stored data; and a data operation unit for operating according to said read data and outputting an operation result; wherein said data read section specifies said reference register out of said plural registers when said command is said special command, and for outputting reference stored data which is stored data in said reference register as said read data; and wherein said data operation section comprises data comparative means for comparing said reference stored data with comparative data to output a comparative result signal. - View Dependent Claims (8, 9, 10, 11, 12, 13, 14, 15)
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6. A computer comprising:
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a data read section including plural registers for outputting stored data of said plural registers selectively as read data based on a command obtained from outside; and a data operation unit for operating according to said read data and outputting an operation result; wherein said data read section specifies a reference register out of said plural registers when said command is a special command, and for outputting reference stored data which is stored data in said reference register as said read data; and wherein said data operation section comprises data comparative means for comparing said reference stored data with comparative data to output a comparative result signal, wherein said data read section comprises; control means for outputting a read address signal based on said command, and asserting a special command signal when said command is a special command; and a register group including said plural registers, for receiving said read address signal, and outputting stored data of said plural registers selectively as said read data based on said read address signal, wherein said register group further receives said special command signal, and outputs said reference stored data of said reference register as said read data regardless of said read address signal when said special command signal is asserted. - View Dependent Claims (7)
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16. A computer comprising:
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a data read section including plural registers for outputting stored data of said plural registers selectively as read data based on a command obtained from outside, wherein said data read section preliminarily specifies at least two registers out of said plural registers as an addition register group, and preliminarily specifies at least two registers out of said plural registers other than said addition register group as a reference register group, said command includes a special command including a first register specifying value for specifying an addition register in said addition register group, and a second register specifying value for specifying a reference register in said reference register group; a data operation section for operating according to said read data to output an operation result; wherein said data read section specifies said addition register in said addition register group based on said first register specifying value, when said command is said special command, specifying said reference register in said reference register group based on said second register specifying value, and outputting as said read data both addition stored data which is stored data of said addition register and reference stored data which is stored data of said reference register; and wherein said data operation section comprises data comparative means for comparing
1) comparative data generated by using said addition data, with
2) said reference stored data, to output a comparative result signal.
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Specification